drivers, block: remove sil680 driver

[people/ms/u-boot.git] / arch / powerpc / cpu / ppc4xx / start.S

diff --git a/arch/powerpc/cpu/ppc4xx/start.S b/arch/powerpc/cpu/ppc4xx/start.S
index 7a0f0d25d14daf0745d7f978343a540a36a862a1..7633abc1a16bc24bc146d185b5e1e16fd06da40b 100644 (file)
--- a/arch/powerpc/cpu/ppc4xx/start.S
+++ b/arch/powerpc/cpu/ppc4xx/start.S
@@ -144,7 +144,7 @@
 #endif
 
 /*
- * Unless otherwise overriden, enable two 128MB cachable instruction regions
+ * Unless otherwise overridden, enable two 128MB cachable instruction regions
  * at CONFIG_SYS_SDRAM_BASE and another 128MB cacheable instruction region covering
  * NOR flash at CONFIG_SYS_FLASH_BASE. Disable all cacheable data regions.
  */
@@ -743,8 +743,16 @@ _start:
        /*----------------------------------------------------------------*/
        /* Setup the stack in internal SRAM */
        /*----------------------------------------------------------------*/
-       lis     r1,CONFIG_SYS_INIT_RAM_ADDR@h
-       ori     r1,r1,CONFIG_SYS_INIT_SP_OFFSET@l
+       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+       /*
+        * Reserve space for globals and store address for initialization
+        * with board_init_f_init_reserve() in r14
+        */
+       mr      r3, r1
+       bl      board_init_f_alloc_reserve
+       mr      r1, r3
+       mr      r14, r3
        li      r0,0
        stwu    r0,-4(r1)
        stwu    r0,-4(r1)               /* Terminate call chain */
@@ -760,14 +768,9 @@ _start:
 #endif
 
        bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
-#ifdef CONFIG_SYS_GENERIC_BOARD
-       mr      r3, r1
-       bl      board_init_f_mem
-       mr      r1, r3
-       li      r0,0
-       stwu    r0, -4(r1)
-       stwu    r0, -4(r1)
-#endif
+       /* address for globals was stored in r14 */
+       mr      r3, r14
+       bl      board_init_f_init_reserve
        li      r3, 0
        bl      board_init_f
        /* NOTREACHED - board_init_f() does not return */
@@ -832,8 +835,16 @@ _start:
         * for their primordial stack, setup stack here directly after the
         * SDRAM is initialized in ext_bus_cntlr_init.
         */
-       lis     r1, CONFIG_SYS_INIT_RAM_ADDR@h
-       ori     r1,r1,CONFIG_SYS_INIT_SP_OFFSET /* set up the stack in SDRAM */
+       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+       /*
+        * Reserve space for globals and store address for initialization
+        * with board_init_f_init_reserve() in r14
+        */
+       mr      r3, r1
+       bl      board_init_f_alloc_reserve
+       mr      r1, r3
+       mr      r14, r3
 
        li      r0, 0                   /* Make room for stack frame header and */
        stwu    r0, -4(r1)              /* clear final stack frame so that      */
@@ -973,8 +984,16 @@ _start:
         * Load the initial stack pointer and data area and convert the size,
         * in bytes, to the number of words to initialize to a known value.
         */
-       lis     r1, CONFIG_SYS_INIT_RAM_ADDR@h
-       ori     r1, r1, CONFIG_SYS_INIT_SP_OFFSET@l
+       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+       /*
+        * Reserve space for globals and store address for initialization
+        * with board_init_f_init_reserve() in r14
+        */
+       mr      r3, r1
+       bl      board_init_f_alloc_reserve
+       mr      r1, r3
+       mr      r14, r3
 
        lis     r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@h
        ori     r4, r4, (CONFIG_SYS_INIT_RAM_SIZE >> 2)@l
@@ -994,6 +1013,7 @@ _start:
         * Make room for stack frame header and clear final stack frame so
         * that stack backtraces terminate cleanly.
         */
+       li      r0, 0
        stwu    r0, -4(r1)
        stwu    r0, -4(r1)
 
@@ -1012,10 +1032,16 @@ _start:
        /*
         * Stack in OCM.
         */
-
-       /* Set up Stack at top of OCM */
-       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@h
-       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)@l
+       lis     r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@h
+       ori     r1, r1, (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE)@l
+       /*
+        * Reserve space for globals and store address for initialization
+        * with board_init_f_init_reserve() in r14
+        */
+       mr      r3, r1
+       bl      board_init_f_alloc_reserve
+       mr      r1, r3
+       mr      r14, r3
 
        /* Set up a zeroized stack frame so that backtrace works right */
        li      r0, 0
@@ -1036,13 +1062,9 @@ _start:
        GET_GOT                 /* initialize GOT access                        */
 
        bl      cpu_init_f      /* run low-level CPU init code     (from Flash) */
-#ifdef CONFIG_SYS_GENERIC_BOARD
-       mr      r3, r1
-       bl      board_init_f_mem
-       mr      r1, r3
-       stwu    r0, -4(r1)
-       stwu    r0, -4(r1)
-#endif
+       /* address for globals was stored in r14 */
+       mr      r3, r14
+       bl      board_init_f_init_reserve
        li      r3, 0
        bl      board_init_f    /* run first part of init code (from Flash)     */
        /* NOTREACHED - board_init_f() does not return */
@@ -1795,49 +1817,11 @@ ppc405ep_init:
 ..no_pllset:
 #endif /* CONFIG_BUBINGA */
 
-#ifdef CONFIG_TAIHU
-       mfdcr   r4, CPC0_BOOT
-       andi.   r5, r4, CPC0_BOOT_SEP@l
-       bne     strap_1                 /* serial eeprom present */
-       addis   r5,0,CPLD_REG0_ADDR@h
-       ori     r5,r5,CPLD_REG0_ADDR@l
-       andi.   r5, r5, 0x10
-       bne     _pci_66mhz
-#endif /* CONFIG_TAIHU */
-
-#if defined(CONFIG_ZEUS)
-       mfdcr   r4, CPC0_BOOT
-       andi.   r5, r4, CPC0_BOOT_SEP@l
-       bne     strap_1                 /* serial eeprom present */
-       lis     r3,0x0000
-       addi    r3,r3,0x3030
-       lis     r4,0x8042
-       addi    r4,r4,0x223e
-       b       1f
-strap_1:
-       mfdcr   r3, CPC0_PLLMR0
-       mfdcr   r4, CPC0_PLLMR1
-       b       1f
-#endif
-
        addis   r3,0,PLLMR0_DEFAULT@h   /* PLLMR0 default value */
        ori     r3,r3,PLLMR0_DEFAULT@l  /* */
        addis   r4,0,PLLMR1_DEFAULT@h   /* PLLMR1 default value */
        ori     r4,r4,PLLMR1_DEFAULT@l  /* */
 
-#ifdef CONFIG_TAIHU
-       b       1f
-_pci_66mhz:
-       addis   r3,0,PLLMR0_DEFAULT_PCI66@h
-       ori     r3,r3,PLLMR0_DEFAULT_PCI66@l
-       addis   r4,0,PLLMR1_DEFAULT_PCI66@h
-       ori     r4,r4,PLLMR1_DEFAULT_PCI66@l
-       b       1f
-strap_1:
-       mfdcr   r3, CPC0_PLLMR0
-       mfdcr   r4, CPC0_PLLMR1
-#endif /* CONFIG_TAIHU */
-
 1:
        b       pll_write               /* Write the CPC0_PLLMR with new value */