x86: Add Intel Braswell SoC support

[people/ms/u-boot.git] / arch / x86 / Kconfig

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 277c3babf37495623730d8a03e64ca0635a4172c..38a618753a2a931e2599481867d6cf5e4b408e52 100644 (file)
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -108,6 +108,7 @@ source "board/intel/Kconfig"
 
 # platform-specific options below
 source "arch/x86/cpu/baytrail/Kconfig"
+source "arch/x86/cpu/braswell/Kconfig"
 source "arch/x86/cpu/broadwell/Kconfig"
 source "arch/x86/cpu/coreboot/Kconfig"
 source "arch/x86/cpu/ivybridge/Kconfig"
@@ -558,6 +559,48 @@ config VGA_BIOS_ADDR
          address of 0xfff90000 indicates that the image will be put at offset
          0x90000 from the beginning of a 1MB flash device.
 
+config HAVE_VBT
+       bool "Add a Video BIOS Table (VBT) image"
+       depends on HAVE_FSP
+       help
+         Select this option if you have a Video BIOS Table (VBT) image that
+         you would like to add to your ROM. This is normally required if you
+         are using an Intel FSP firmware that is complaint with spec 1.1 or
+         later to initialize the integrated graphics device (IGD).
+
+         Video BIOS Table, or VBT, provides platform and board specific
+         configuration information to the driver that is not discoverable
+         or available through other means. By other means the most used
+         method here is to read EDID table from the attached monitor, over
+         Display Data Channel (DDC) using two pin I2C serial interface. VBT
+         configuration is related to display hardware and is available via
+         the ACPI OpRegion or, on older systems, in the PCI ROM (Option ROM).
+
+config VBT_FILE
+       string "Video BIOS Table (VBT) image filename"
+       depends on HAVE_VBT
+       default "vbt.bin"
+       help
+         The filename of the file to use as Video BIOS Table (VBT) image
+         in the board directory.
+
+config VBT_ADDR
+       hex "Video BIOS Table (VBT) image location"
+       depends on HAVE_VBT
+       default 0xfff90000
+       help
+         The location of Video BIOS Table (VBT) image in the SPI flash. For
+         example, base address of 0xfff90000 indicates that the image will
+         be put at offset 0x90000 from the beginning of a 1MB flash device.
+
+config VIDEO_FSP
+       bool "Enable FSP framebuffer driver support"
+       depends on HAVE_VBT && DM_VIDEO
+       help
+         Turn on this option to enable a framebuffer driver when U-Boot is
+         using Video BIOS Table (VBT) image for FSP firmware to initialize
+         the integrated graphics device.
+
 config ROM_TABLE_ADDR
        hex
        default 0xf0000