part: Drop disk_partition_t typedef

[thirdparty/u-boot.git] / arch / x86 / cpu / quark / quark.c

diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 77d644a4914937172ffd6645c603386ab5a4afc1..46c6d00eb4db9daabd9283d9e4433bdc8be7b8b5 100644 (file)
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -1,40 +1,23 @@
+// SPDX-License-Identifier: GPL-2.0+
 /*
  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #include <common.h>
+#include <cpu_func.h>
 #include <mmc.h>
+#include <asm/cache.h>
 #include <asm/io.h>
+#include <asm/ioapic.h>
 #include <asm/irq.h>
+#include <asm/mrccache.h>
 #include <asm/mtrr.h>
 #include <asm/pci.h>
 #include <asm/post.h>
-#include <asm/processor.h>
 #include <asm/arch/device.h>
 #include <asm/arch/msg_port.h>
 #include <asm/arch/quark.h>
 
-static struct pci_device_id mmc_supported[] = {
-       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QRK_SDIO },
-};
-
-/*
- * TODO:
- *
- * This whole routine should be removed until we fully convert the ICH SPI
- * driver to DM and make use of DT to pass the bios control register offset
- */
-static void unprotect_spi_flash(void)
-{
-       u32 bc;
-
-       qrk_pci_read_config_dword(QUARK_LEGACY_BRIDGE, 0xd8, &bc);
-       bc |= 0x1;      /* unprotect the flash */
-       qrk_pci_write_config_dword(QUARK_LEGACY_BRIDGE, 0xd8, bc);
-}
-
 static void quark_setup_mtrr(void)
 {
        u32 base, mask;
@@ -232,9 +215,6 @@ int arch_cpu_init(void)
        int ret;
 
        post_code(POST_CPU_INIT);
-#ifdef CONFIG_SYS_X86_TSC_TIMER
-       timer_set_base(rdtsc());
-#endif
 
        ret = x86_cpu_init_f();
        if (ret)
@@ -253,6 +233,20 @@ int arch_cpu_init(void)
         */
        quark_setup_bars();
 
+       /* Initialize USB2 PHY */
+       quark_usb_early_init();
+
+       /* Initialize thermal sensor */
+       quark_thermal_early_init();
+
+       /* Turn on legacy segments (A/B/E/F) decode to system RAM */
+       quark_enable_legacy_seg();
+
+       return 0;
+}
+
+int arch_cpu_init_dm(void)
+{
        /*
         * Initialize PCIe controller
         *
@@ -264,17 +258,11 @@ int arch_cpu_init(void)
         */
        quark_pcie_early_init();
 
-       /* Initialize USB2 PHY */
-       quark_usb_early_init();
-
-       /* Initialize thermal sensor */
-       quark_thermal_early_init();
-
-       /* Turn on legacy segments (A/B/E/F) decode to system RAM */
-       quark_enable_legacy_seg();
-
-       unprotect_spi_flash();
+       return 0;
+}
 
+int checkcpu(void)
+{
        return 0;
 }
 
@@ -284,12 +272,6 @@ int print_cpuinfo(void)
        return default_print_cpuinfo();
 }
 
-void reset_cpu(ulong addr)
-{
-       /* cold reset */
-       x86_full_reset();
-}
-
 static void quark_pcie_init(void)
 {
        u32 val;
@@ -328,22 +310,7 @@ static void quark_usb_init(void)
        writel((0xf << 16) | 0xf, bar + USBD_EP_INT_STS);
 }
 
-int arch_early_init_r(void)
-{
-       quark_pcie_init();
-
-       quark_usb_init();
-
-       return 0;
-}
-
-int cpu_mmc_init(bd_t *bis)
-{
-       return pci_mmc_init("Quark SDHCI", mmc_supported,
-                           ARRAY_SIZE(mmc_supported));
-}
-
-void cpu_irq_init(void)
+static void quark_irq_init(void)
 {
        struct quark_rcba *rcba;
        u32 base;
@@ -366,9 +333,32 @@ void cpu_irq_init(void)
               &rcba->d20d21_ir);
 }
 
+int arch_early_init_r(void)
+{
+       quark_pcie_init();
+
+       quark_usb_init();
+
+       quark_irq_init();
+
+       return 0;
+}
+
 int arch_misc_init(void)
 {
-       return pirq_init();
+#ifdef CONFIG_ENABLE_MRC_CACHE
+       /*
+        * We intend not to check any return value here, as even MRC cache
+        * is not saved successfully, it is not a severe error that will
+        * prevent system from continuing to boot.
+        */
+       mrccache_save();
+#endif
+
+       /* Assign a unique I/O APIC ID */
+       io_apic_set_id(1);
+
+       return 0;
 }
 
 void board_final_cleanup(void)