Merge git://git.denx.de/u-boot-sunxi

[people/ms/u-boot.git] / board / amlogic / odroid-c2 / odroid-c2.c

diff --git a/board/amlogic/odroid-c2/odroid-c2.c b/board/amlogic/odroid-c2/odroid-c2.c
index eac04d8178d2806cd28dacae40bf5f0bb68f1db4..0cb571432f0bc46157cc136fc2f7231df369f310 100644 (file)
--- a/board/amlogic/odroid-c2/odroid-c2.c
+++ b/board/amlogic/odroid-c2/odroid-c2.c
@@ -9,7 +9,8 @@
 #include <asm/io.h>
 #include <asm/arch/gxbb.h>
 #include <asm/arch/sm.h>
-#include <phy.h>
+#include <asm/arch/eth.h>
+#include <asm/arch/mem.h>
 
 #define EFUSE_SN_OFFSET                20
 #define EFUSE_SN_SIZE          16
@@ -27,16 +28,10 @@ int misc_init_r(void)
        char serial[EFUSE_SN_SIZE];
        ssize_t len;
 
-       /* Set RGMII mode */
-       setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
-                                    GXBB_ETH_REG_0_TX_PHASE(1) |
-                                    GXBB_ETH_REG_0_TX_RATIO(4) |
-                                    GXBB_ETH_REG_0_PHY_CLK_EN |
-                                    GXBB_ETH_REG_0_CLK_EN);
+       meson_gx_eth_init(PHY_INTERFACE_MODE_RGMII, 0);
 
        /* Enable power and clock gate */
-       setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH);
-       clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK);
+       setbits_le32(GXBB_GCLK_MPEG_0, GXBB_GCLK_MPEG_0_I2C);
 
        /* Reset PHY on GPIOZ_14 */
        clrbits_le32(GXBB_GPIO_EN(3), BIT(14));
@@ -60,3 +55,10 @@ int misc_init_r(void)
 
        return 0;
 }
+
+int ft_board_setup(void *blob, bd_t *bd)
+{
+       meson_gx_init_reserved_memory(blob);
+
+       return 0;
+}