#include <dm.h>
#include <fsl_esdhc.h>
#include <miiphy.h>
+#include <mtd_node.h>
#include <netdev.h>
#include <errno.h>
#include <usb.h>
#include <asm/io.h>
#include <asm/gpio.h>
#include <dm/platform_data/serial_mxc.h>
+#include <jffs2/load_kernel.h>
#include "common.h"
#include "../common/eeprom.h"
#include "../common/common.h"
#ifdef CONFIG_OF_BOARD_SETUP
#define USDHC3_PATH "/soc/aips-bus@02100000/usdhc@02198000/"
+
+struct node_info nodes[] = {
+ /*
+ * Both entries target the same flash chip. The st,m25p compatible
+ * is used in the vendor device trees, while upstream uses (the
+ * documented) jedec,spi-nor compatible.
+ */
+ { "st,m25p", MTD_DEV_TYPE_NOR, },
+ { "jedec,spi-nor", MTD_DEV_TYPE_NOR, },
+};
+
int ft_board_setup(void *blob, bd_t *bd)
{
u32 baseboard_rev;
char baseboard_name[16];
int err;
+ fdt_shrink_to_minimum(blob, 0); /* Make room for new properties */
+
/* MAC addr */
if (eth_getenv_enetaddr("ethaddr", enetaddr)) {
fdt_find_and_setprop(blob,
enetaddr, 6, 1);
}
+ fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
+
baseboard_rev = cl_eeprom_get_board_rev(0);
err = cl_eeprom_get_product_name((uchar *)baseboard_name, 0);
if (err || baseboard_rev == 0)
return 0; /* Assume not an early revision SB-FX6m baseboard */
if (!strncmp("SB-FX6m", baseboard_name, 7) && baseboard_rev <= 120) {
- fdt_shrink_to_minimum(blob); /* Make room for new properties */
nodeoffset = fdt_path_offset(blob, USDHC3_PATH);
fdt_delprop(blob, nodeoffset, "cd-gpios");
fdt_find_and_setprop(blob, USDHC3_PATH, "broken-cd",
return 0;
}
-void dram_init_banksize(void)
+int dram_init_banksize(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
gd->bd->bi_dram[1].size = 0x7FF00000;
break;
}
+
+ return 0;
}
int dram_init(void)