board_f: Drop setup_dram_config() wrapper

[people/ms/u-boot.git] / board / esd / meesc / meesc.c

diff --git a/board/esd/meesc/meesc.c b/board/esd/meesc/meesc.c
index 9bf67390811cfed9eb6b0f8c3d3036d23d4005e7..19b673e6d216a289d5d4d8075331e5fee9c61039 100644 (file)
--- a/board/esd/meesc/meesc.c
+++ b/board/esd/meesc/meesc.c
@@ -3,7 +3,7 @@
  * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
- * (C) Copyright 2009-2011
+ * (C) Copyright 2009-2015
  * Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
  * esd electronic system design gmbh <www.esd.eu>
  *
@@ -12,6 +12,7 @@
 
 #include <common.h>
 #include <asm/io.h>
+#include <asm/gpio.h>
 #include <asm/arch/at91sam9_smc.h>
 #include <asm/arch/at91_common.h>
 #include <asm/arch/at91_pmc.h>
@@ -27,6 +28,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * Miscelaneous platform dependent initialisations
  */
 
+#ifdef CONFIG_REVISION_TAG
 static int hw_rev = -1;        /* hardware revision */
 
 int get_hw_rev(void)
@@ -44,6 +46,7 @@ int get_hw_rev(void)
 
        return hw_rev;
 }
+#endif /* CONFIG_REVISION_TAG */
 
 #ifdef CONFIG_CMD_NAND
 static void meesc_nand_hw_init(void)
@@ -74,19 +77,18 @@ static void meesc_nand_hw_init(void)
                &smc->cs[3].mode);
 
        /* Configure RDY/BSY */
-       at91_set_pio_input(CONFIG_SYS_NAND_READY_PIN, 1);
+       gpio_direction_input(CONFIG_SYS_NAND_READY_PIN);
 
        /* Enable NandFlash */
-       at91_set_pio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
+       gpio_direction_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
 }
 #endif /* CONFIG_CMD_NAND */
 
 #ifdef CONFIG_MACB
 static void meesc_macb_hw_init(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-       /* Enable clock */
-       writel(1 << ATMEL_ID_EMAC, &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_EMAC);
+
        at91_macb_hw_init();
 }
 #endif
@@ -124,9 +126,17 @@ static void meesc_ethercat_hw_init(void)
 
 int dram_init(void)
 {
-       gd->ram_size = get_ram_size(
-               (void *)CONFIG_SYS_SDRAM_BASE,
-               CONFIG_SYS_SDRAM_SIZE);
+       /* dram_init must store complete ramsize in gd->ram_size */
+       gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
+                               PHYS_SDRAM_SIZE);
+       return 0;
+}
+
+int dram_init_banksize(void)
+{
+       gd->bd->bi_dram[0].start = PHYS_SDRAM;
+       gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
+
        return 0;
 }
 
@@ -139,6 +149,7 @@ int board_eth_init(bd_t *bis)
        return rc;
 }
 
+#ifdef CONFIG_DISPLAY_BOARDINFO
 int checkboard(void)
 {
        char str[32];
@@ -172,10 +183,13 @@ int checkboard(void)
                puts(", serial# ");
                puts(str);
        }
+#ifdef CONFIG_REVISION_TAG
        printf("\nHardware-revision: 1.%d\n", get_hw_rev());
+#endif
        printf("Mach-type: %lu\n", gd->bd->bi_arch_number);
        return 0;
 }
+#endif /* CONFIG_DISPLAY_BOARDINFO */
 
 #ifdef CONFIG_SERIAL_TAG
 void get_board_serial(struct tag_serialnr *serialnr)
@@ -231,12 +245,10 @@ int misc_init_r(void)
 
 int board_early_init_f(void)
 {
-       at91_pmc_t      *pmc    = (at91_pmc_t *) ATMEL_BASE_PMC;
-
-       /* enable all clocks */
-       writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
-               (1 << ATMEL_ID_PIOCDE) | (1 << ATMEL_ID_UHP),
-               &pmc->pcer);
+       at91_periph_clk_enable(ATMEL_ID_PIOA);
+       at91_periph_clk_enable(ATMEL_ID_PIOB);
+       at91_periph_clk_enable(ATMEL_ID_PIOCDE);
+       at91_periph_clk_enable(ATMEL_ID_UHP);
 
        at91_seriald_hw_init();