designware_i2c: disable i2c controller during target address setup

[people/ms/u-boot.git] / board / evb64260 / mpsc.c

diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c
index f3dc20b2949e307f490ccf739c91297e13c23f6e..c9da57c20d017bd50f1e362fc84064edae372f12 100644 (file)
--- a/board/evb64260/mpsc.c
+++ b/board/evb64260/mpsc.c
@@ -2,23 +2,7 @@
  * (C) Copyright 2001
  * John Clemens <clemens@mclx.com>, Mission Critical Linux, Inc.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 /*
@@ -88,7 +72,7 @@ static void galsdma_enable_rx(void);
 
 
 /* GT64240A errata: cant read MPSC/BRG registers... so make mirrors in ram for read/modify write */
-#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->mirror_hack[0]))
+#define MIRROR_HACK ((struct _tag_mirror_hack *)&(gd->arch.mirror_hack[0]))
 
 #define GT_REG_WRITE_MIRROR_G(a,d) {MIRROR_HACK->a ## _M = d; GT_REG_WRITE(a,d);}
 #define GTREGREAD_MIRROR_G(a) (MIRROR_HACK->a ## _M)
@@ -801,7 +785,7 @@ galmpsc_shutdown(int mpsc)
 
        GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF, 0);
        GT_REG_WRITE(GALSDMA_0_COM_REG + CHANNEL * GALSDMA_REG_DIFF,
-                    SDMA_TX_ABORT | SDMA_RX_ABORT);
+                    SDMA_TX_ABORT | SDMA_RX_ABORT);
 
        /* shut down the MPSC */
        GT_REG_WRITE(GALMPSC_MCONF_LOW, 0);
@@ -813,7 +797,7 @@ galmpsc_shutdown(int mpsc)
        /* shut down the sdma engines. */
        /* reset config to default */
        GT_REG_WRITE(GALSDMA_0_CONF_REG + CHANNEL * GALSDMA_REG_DIFF,
-                    0x000000fc);
+                    0x000000fc);
 
        udelay(100);