Add more SPDX-License-Identifier tags

[people/ms/u-boot.git] / board / sbc8548 / ddr.c

diff --git a/board/sbc8548/ddr.c b/board/sbc8548/ddr.c
index 0d9a1ba62b7e6a02471cc7a716cf8ff4ac55e246..2ffafa8582fe706e66b115f0d470914259ccc95b 100644 (file)
--- a/board/sbc8548/ddr.c
+++ b/board/sbc8548/ddr.c
@@ -1,15 +1,14 @@
 /*
  * Copyright 2008 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * SPDX-License-Identifier:    GPL-2.0
  */
 
 #include <common.h>
+#include <i2c.h>
 
-#include <asm/fsl_ddr_sdram.h>
-#include <asm/fsl_ddr_dimm_params.h>
+#include <fsl_ddr_sdram.h>
+#include <fsl_ddr_dimm_params.h>
 
 void fsl_ddr_board_options(memctl_options_t *popts,
                                dimm_params_t *pdimm,
@@ -55,14 +54,43 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        popts->half_strength_driver_enable = 0;
 }
 
-#if !defined(CONFIG_SPD_EEPROM)
+#ifdef CONFIG_SPD_EEPROM
+/*
+ * Workaround for hardware errata.  An i2c address conflict
+ * existed on earlier boards; the workaround moved the DDR
+ * SPD from 0x51 to 0x53.  So we try and read 0x53 1st, and
+ * if that fails, then fall back to reading at 0x51.
+ */
+void get_spd(generic_spd_eeprom_t *spd, u8 i2c_address)
+{
+       int ret;
+
+#ifdef ALT_SPD_EEPROM_ADDRESS
+       if (i2c_address == SPD_EEPROM_ADDRESS) {
+               ret = i2c_read(ALT_SPD_EEPROM_ADDRESS, 0, 1, (uchar *)spd,
+                               sizeof(generic_spd_eeprom_t));
+               if (ret == 0)
+                       return;         /* Good data at 0x53 */
+               memset(spd, 0, sizeof(generic_spd_eeprom_t));
+       }
+#endif
+       ret = i2c_read(i2c_address, 0, 1, (uchar *)spd,
+                               sizeof(generic_spd_eeprom_t));
+       if (ret) {
+               printf("DDR: failed to read SPD from addr %u\n", i2c_address);
+               memset(spd, 0, sizeof(generic_spd_eeprom_t));
+       }
+}
+
+#else
 /*
  *  fixed_sdram init -- doesn't use serial presence detect.
  *  Assumes 256MB DDR2 SDRAM SODIMM, without ECC, running at DDR400 speed.
  */
 phys_size_t fixed_sdram(void)
 {
-       volatile ccsr_ddr_t *ddr = (void *)(CONFIG_SYS_MPC85xx_DDR_ADDR);
+       struct ccsr_ddr __iomem *ddr =
+               (struct ccsr_ddr __iomem *)(CONFIG_SYS_FSL_DDR_ADDR);
 
        out_be32(&ddr->cs0_bnds,        0x0000007f);
        out_be32(&ddr->cs1_bnds,        0x008000ff);