]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - board/ti/dra7xx/evm.c
board_f: Drop setup_dram_config() wrapper
[people/ms/u-boot.git] / board / ti / dra7xx / evm.c
index f2d16a0f5e2535557769c3ad4785abc2e0604697..ae2d59da432ef26ff47a9948b31e93e898040181 100644 (file)
@@ -408,10 +408,60 @@ struct vcores_data dra722_volts = {
        .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
 };
 
+struct vcores_data dra718_volts = {
+       /*
+        * In the case of dra71x GPU MPU and CORE
+        * are all powered up by BUCK0 of LP873X PMIC
+        */
+       .mpu.value[OPP_NOM]     = VDD_MPU_DRA7_NOM,
+       .mpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_MPU_NOM,
+       .mpu.efuse.reg_bits     = DRA752_EFUSE_REGBITS,
+       .mpu.addr       = LP873X_REG_ADDR_BUCK0,
+       .mpu.pmic       = &lp8733,
+       .mpu.abb_tx_done_mask = OMAP_ABB_MPU_TXDONE_MASK,
+
+       .core.value[OPP_NOM]            = VDD_CORE_DRA7_NOM,
+       .core.efuse.reg[OPP_NOM]        = STD_FUSE_OPP_VMIN_CORE_NOM,
+       .core.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .core.addr      = LP873X_REG_ADDR_BUCK0,
+       .core.pmic      = &lp8733,
+
+       .gpu.value[OPP_NOM]     = VDD_GPU_DRA7_NOM,
+       .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
+       .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .gpu.addr       = LP873X_REG_ADDR_BUCK0,
+       .gpu.pmic       = &lp8733,
+       .gpu.abb_tx_done_mask = OMAP_ABB_GPU_TXDONE_MASK,
+
+       /*
+        * The DSPEVE and IVA rails are grouped on DRA71x-evm
+        * and are powered by BUCK1 of LP873X PMIC
+        */
+       .eve.value[OPP_NOM]     = VDD_EVE_DRA7_NOM,
+       .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
+       .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .eve.addr       = LP873X_REG_ADDR_BUCK1,
+       .eve.pmic       = &lp8733,
+       .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
+
+       .iva.value[OPP_NOM]     = VDD_IVA_DRA7_NOM,
+       .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
+       .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
+       .iva.addr       = LP873X_REG_ADDR_BUCK1,
+       .iva.pmic       = &lp8733,
+       .iva.abb_tx_done_mask = OMAP_ABB_IVA_TXDONE_MASK,
+};
+
 int get_voltrail_opp(int rail_offset)
 {
        int opp;
 
+       /*
+        * DRA71x supports only OPP_NOM.
+        */
+       if (board_is_dra71x_evm())
+               return OPP_NOM;
+
        switch (rail_offset) {
        case VOLT_MPU:
                opp = DRA7_MPU_OPP;
@@ -448,7 +498,7 @@ int board_init(void)
        return 0;
 }
 
-void dram_init_banksize(void)
+int dram_init_banksize(void)
 {
        u64 ram_size;
 
@@ -460,6 +510,8 @@ void dram_init_banksize(void)
                gd->bd->bi_dram[1].start = 0x200000000;
                gd->bd->bi_dram[1].size = ram_size - CONFIG_MAX_MEM_MAPPED;
        }
+
+       return 0;
 }
 
 int board_late_init(void)
@@ -541,6 +593,8 @@ void vcores_init(void)
                *omap_vcores = &dra752_volts;
        } else if (board_is_dra72x_evm()) {
                *omap_vcores = &dra722_volts;
+       } else if (board_is_dra71x_evm()) {
+               *omap_vcores = &dra718_volts;
        } else {
                /* If EEPROM is not populated */
                if (is_dra72x())
@@ -627,7 +681,7 @@ err:
 }
 #endif
 
-#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_GENERIC_MMC)
+#if defined(CONFIG_GENERIC_MMC)
 int board_mmc_init(bd_t *bis)
 {
        omap_mmc_init(0, 0, 0, -1, -1);
@@ -897,7 +951,10 @@ int ft_board_setup(void *blob, bd_t *bd)
 int board_fit_config_name_match(const char *name)
 {
        if (is_dra72x()) {
-               if (board_is_dra72x_revc_or_later()) {
+               if (board_is_dra71x_evm()) {
+                       if (!strcmp(name, "dra71-evm"))
+                               return 0;
+               }else if(board_is_dra72x_revc_or_later()) {
                        if (!strcmp(name, "dra72-evm-revc"))
                                return 0;
                } else if (!strcmp(name, "dra72-evm")) {