]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - board/xilinx/zynq/board.c
board_f: Drop setup_dram_config() wrapper
[people/ms/u-boot.git] / board / xilinx / zynq / board.c
index 01bae5d67e3f9ee686013a4db934a7ff9cac9144..b2fbecf6dedd513213ae205e9a42007ebf6d678b 100644 (file)
@@ -19,7 +19,10 @@ DECLARE_GLOBAL_DATA_PTR;
 static xilinx_desc fpga;
 
 /* It can be done differently */
+static xilinx_desc fpga007s = XILINX_XC7Z007S_DESC(0x7);
 static xilinx_desc fpga010 = XILINX_XC7Z010_DESC(0x10);
+static xilinx_desc fpga012s = XILINX_XC7Z012S_DESC(0x12);
+static xilinx_desc fpga014s = XILINX_XC7Z014S_DESC(0x14);
 static xilinx_desc fpga015 = XILINX_XC7Z015_DESC(0x15);
 static xilinx_desc fpga020 = XILINX_XC7Z020_DESC(0x20);
 static xilinx_desc fpga030 = XILINX_XC7Z030_DESC(0x30);
@@ -37,9 +40,18 @@ int board_init(void)
        idcode = zynq_slcr_get_idcode();
 
        switch (idcode) {
+       case XILINX_ZYNQ_7007S:
+               fpga = fpga007s;
+               break;
        case XILINX_ZYNQ_7010:
                fpga = fpga010;
                break;
+       case XILINX_ZYNQ_7012S:
+               fpga = fpga012s;
+               break;
+       case XILINX_ZYNQ_7014S:
+               fpga = fpga014s;
+               break;
        case XILINX_ZYNQ_7015:
                fpga = fpga015;
                break;
@@ -73,6 +85,12 @@ int board_init(void)
 int board_late_init(void)
 {
        switch ((zynq_slcr_get_boot_mode()) & ZYNQ_BM_MASK) {
+       case ZYNQ_BM_QSPI:
+               setenv("modeboot", "qspiboot");
+               break;
+       case ZYNQ_BM_NAND:
+               setenv("modeboot", "nandboot");
+               break;
        case ZYNQ_BM_NOR:
                setenv("modeboot", "norboot");
                break;
@@ -98,30 +116,43 @@ int checkboard(void)
 }
 #endif
 
+int zynq_board_read_rom_ethaddr(unsigned char *ethaddr)
+{
+#if defined(CONFIG_ZYNQ_GEM_EEPROM_ADDR) && \
+    defined(CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET)
+       if (eeprom_read(CONFIG_ZYNQ_GEM_EEPROM_ADDR,
+                       CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET,
+                       ethaddr, 6))
+               printf("I2C EEPROM MAC address read failed\n");
+#endif
+
+       return 0;
+}
+
+#if !defined(CONFIG_SYS_SDRAM_BASE) && !defined(CONFIG_SYS_SDRAM_SIZE)
+int dram_init_banksize(void)
+{
+       fdtdec_setup_memory_banksize();
+
+       return 0;
+}
+
 int dram_init(void)
 {
-#if CONFIG_IS_ENABLED(OF_CONTROL)
-       int node;
-       fdt_addr_t addr;
-       fdt_size_t size;
-       const void *blob = gd->fdt_blob;
-
-       node = fdt_node_offset_by_prop_value(blob, -1, "device_type",
-                                            "memory", 7);
-       if (node == -FDT_ERR_NOTFOUND) {
-               debug("ZYNQ DRAM: Can't get memory node\n");
-               return -1;
-       }
-       addr = fdtdec_get_addr_size(blob, node, "reg", &size);
-       if (addr == FDT_ADDR_T_NONE || size == 0) {
-               debug("ZYNQ DRAM: Can't get base address or size\n");
-               return -1;
-       }
-       gd->ram_size = size;
+       if (fdtdec_setup_memory_size() != 0)
+               return -EINVAL;
+
+       zynq_ddrc_init();
+
+       return 0;
+}
 #else
+int dram_init(void)
+{
        gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
-#endif
+
        zynq_ddrc_init();
 
        return 0;
 }
+#endif