rename CFG_ macros to CONFIG_SYS

[people/ms/u-boot.git] / cpu / mpc83xx / cpu.c

diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index 5862acdc459fcc284ee21cfdca8c03b0e8665cb3..05c2f33f9eaffadccdb098ec71a314e26b5d350f 100644 (file)
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -67,7 +67,7 @@ int checkcpu(void)
                CPU_TYPE_ENTRY(8379),
        };
 
-       immr = (immap_t *)CFG_IMMR;
+       immr = (immap_t *)CONFIG_SYS_IMMR;
 
        puts("CPU:   ");
 
@@ -124,8 +124,8 @@ int checkcpu(void)
  * The 'dummy' variable is used to increment the MAD. 'dummy' is
  * supposed to be a pointer to the memory of the device being
  * programmed by the UPM.  The data in the MDR is written into
- * memory and the MAD is incremented every time there's a read
- * from 'dummy'. Unfortunately, the current prototype for this
+ * memory and the MAD is incremented every time there's a write
+ * to 'dummy'. Unfortunately, the current prototype for this
  * function doesn't allow for passing the address of this
  * device, and changing the prototype will break a number lots
  * of other code, so we need to use a round-about way of finding
@@ -148,7 +148,7 @@ int checkcpu(void)
 void upmconfig (uint upm, uint *table, uint size)
 {
 #if defined(CONFIG_MPC834X)
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile lbus83xx_t *lbus = &immap->lbus;
        volatile uchar *dummy = NULL;
        const u32 msel = (upm + 4) << BR_MSEL_SHIFT;    /* What the MSEL field in BRn should be */
@@ -174,8 +174,9 @@ void upmconfig (uint upm, uint *table, uint size)
        for (i = 0; i < size; i++) {
                lbus->mdr = table[i];
                __asm__ __volatile__ ("sync");
-               *dummy; /* Write the value to memory and increment MAD */
+               *dummy = 0;     /* Write the value to memory and increment MAD */
                __asm__ __volatile__ ("sync");
+               while(((*mxmr & 0x3f) != ((i + 1) & 0x3f)));
        }
 
        /* Set the OP field in the MxMR to "normal" and the MAD field to 000000 */
@@ -195,7 +196,7 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
        ulong addr;
 #endif
 
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
 
 #ifdef MPC83xx_RESET
        /* Interrupts and MMU off */
@@ -234,7 +235,7 @@ do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
         * Trying to execute the next instruction at a non-existing address
         * should cause a machine check, resulting in reset
         */
-       addr = CFG_RESET_ADDRESS;
+       addr = CONFIG_SYS_RESET_ADDRESS;
 
        printf("resetting the board.");
        printf("\n");
@@ -265,7 +266,7 @@ void watchdog_reset (void)
        int re_enable = disable_interrupts();
 
        /* Reset the 83xx watchdog */
-       volatile immap_t *immr = (immap_t *) CFG_IMMR;
+       volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
        immr->wdt.swsrr = 0x556c;
        immr->wdt.swsrr = 0xaa39;
 
@@ -277,7 +278,7 @@ void watchdog_reset (void)
 #if defined(CONFIG_DDR_ECC)
 void dma_init(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
        volatile dma83xx_t *dma = &immap->dma;
        volatile u32 status = swab32(dma->dmasr0);
        volatile u32 dmamr0 = swab32(dma->dmamr0);
@@ -308,7 +309,7 @@ void dma_init(void)
 
 uint dma_check(void)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
        volatile dma83xx_t *dma = &immap->dma;
        volatile u32 status = swab32(dma->dmasr0);
        volatile u32 byte_count = swab32(dma->dmabcr0);
@@ -327,7 +328,7 @@ uint dma_check(void)
 
 int dma_xfer(void *dest, u32 count, void *src)
 {
-       volatile immap_t *immap = (immap_t *)CFG_IMMR;
+       volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
        volatile dma83xx_t *dma = &immap->dma;
        volatile u32 dmamr0;