Merge git://git.denx.de/u-boot-marvell

[people/ms/u-boot.git] / drivers / clk / uniphier / clk-uniphier-core.c

diff --git a/drivers/clk/uniphier/clk-uniphier-core.c b/drivers/clk/uniphier/clk-uniphier-core.c
index 8ad0242d2a77e83f8330fd9fb3e6b02d1cea16b7..722cd6b060c8d02896aa08f4ec0de4a8394b8686 100644 (file)
--- a/drivers/clk/uniphier/clk-uniphier-core.c
+++ b/drivers/clk/uniphier/clk-uniphier-core.c
@@ -7,7 +7,7 @@
 
 #include <common.h>
 #include <clk-uclass.h>
-#include <dm/device.h>
+#include <dm.h>
 #include <linux/bitops.h>
 #include <linux/io.h>
 #include <linux/sizes.h>
@@ -121,7 +121,7 @@ static ulong uniphier_clk_set_rate(struct clk *clk, ulong rate)
        return best_rate;
 }
 
-const struct clk_ops uniphier_clk_ops = {
+static const struct clk_ops uniphier_clk_ops = {
        .enable = uniphier_clk_enable,
        .get_rate = uniphier_clk_get_rate,
        .set_rate = uniphier_clk_set_rate,
@@ -132,7 +132,7 @@ static int uniphier_clk_probe(struct udevice *dev)
        struct uniphier_clk_priv *priv = dev_get_priv(dev);
        fdt_addr_t addr;
 
-       addr = dev_get_addr(dev->parent);
+       addr = devfdt_get_addr(dev->parent);
        if (addr == FDT_ADDR_T_NONE)
                return -EINVAL;
 
@@ -146,10 +146,36 @@ static int uniphier_clk_probe(struct udevice *dev)
 }
 
 static const struct udevice_id uniphier_clk_match[] = {
+       /* System clock */
        {
-               .compatible = "socionext,uniphier-sld3-mio-clock",
-               .data = (ulong)&uniphier_mio_clk_data,
+               .compatible = "socionext,uniphier-ld4-clock",
+               .data = (ulong)&uniphier_pxs2_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-pro4-clock",
+               .data = (ulong)&uniphier_pxs2_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-sld8-clock",
+               .data = (ulong)&uniphier_pxs2_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-pro5-clock",
+               .data = (ulong)&uniphier_pxs2_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-pxs2-clock",
+               .data = (ulong)&uniphier_pxs2_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-ld11-clock",
+               .data = (ulong)&uniphier_ld20_sys_clk_data,
+       },
+       {
+               .compatible = "socionext,uniphier-ld20-clock",
+               .data = (ulong)&uniphier_ld20_sys_clk_data,
        },
+       /* Media I/O clock */
        {
                .compatible = "socionext,uniphier-ld4-mio-clock",
                .data = (ulong)&uniphier_mio_clk_data,
@@ -163,11 +189,11 @@ static const struct udevice_id uniphier_clk_match[] = {
                .data = (ulong)&uniphier_mio_clk_data,
        },
        {
-               .compatible = "socionext,uniphier-pro5-mio-clock",
+               .compatible = "socionext,uniphier-pro5-sd-clock",
                .data = (ulong)&uniphier_mio_clk_data,
        },
        {
-               .compatible = "socionext,uniphier-pxs2-mio-clock",
+               .compatible = "socionext,uniphier-pxs2-sd-clock",
                .data = (ulong)&uniphier_mio_clk_data,
        },
        {
@@ -175,7 +201,7 @@ static const struct udevice_id uniphier_clk_match[] = {
                .data = (ulong)&uniphier_mio_clk_data,
        },
        {
-               .compatible = "socionext,uniphier-ld20-mio-clock",
+               .compatible = "socionext,uniphier-ld20-sd-clock",
                .data = (ulong)&uniphier_mio_clk_data,
        },
        { /* sentinel */ }