]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - drivers/ddr/altera/sequencer.c
ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase() part 3
[people/ms/u-boot.git] / drivers / ddr / altera / sequencer.c
index 3d0dc59a076881026117db851d3d2b694d73dfc9..3d975f99fb76ce0ddf5e5bd082e7a2d837235f42 100644 (file)
@@ -1289,75 +1289,70 @@ static uint32_t rw_mgr_mem_calibrate_read_test_all_ranks(uint32_t group,
 /**
  * rw_mgr_incr_vfifo() - Increase VFIFO value
  * @grp:       Read/Write group
- * @v:         VFIFO value
  *
  * Increase VFIFO value.
  */
-static void rw_mgr_incr_vfifo(const u32 grp, u32 *v)
+static void rw_mgr_incr_vfifo(const u32 grp)
 {
        writel(grp, &phy_mgr_cmd->inc_vfifo_hard_phy);
-       (*v)++;
 }
 
 /**
  * rw_mgr_decr_vfifo() - Decrease VFIFO value
  * @grp:       Read/Write group
- * @v:         VFIFO value
  *
  * Decrease VFIFO value.
  */
-static void rw_mgr_decr_vfifo(const u32 grp, u32 *v)
+static void rw_mgr_decr_vfifo(const u32 grp)
 {
        u32 i;
 
        for (i = 0; i < VFIFO_SIZE - 1; i++)
-               rw_mgr_incr_vfifo(grp, v);
+               rw_mgr_incr_vfifo(grp);
 }
 
-static int find_vfifo_read(uint32_t grp, uint32_t *bit_chk)
+/**
+ * find_vfifo_failing_read() - Push VFIFO to get a failing read
+ * @grp:       Read/Write group
+ *
+ * Push VFIFO until a failing read happens.
+ */
+static int find_vfifo_failing_read(const u32 grp)
 {
-       uint32_t  v;
-       uint32_t fail_cnt = 0;
-       uint32_t test_status;
+       u32 v, ret, bit_chk, fail_cnt = 0;
 
-       for (v = 0; v < VFIFO_SIZE; ) {
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: vfifo %u\n",
+       for (v = 0; v < VFIFO_SIZE; v++) {
+               debug_cond(DLEVEL == 2, "%s:%d: vfifo %u\n",
                           __func__, __LINE__, v);
-               test_status = rw_mgr_mem_calibrate_read_test_all_ranks
-                       (grp, 1, PASS_ONE_BIT, bit_chk, 0);
-               if (!test_status) {
+               ret = rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1,
+                                               PASS_ONE_BIT, &bit_chk, 0);
+               if (!ret) {
                        fail_cnt++;
 
                        if (fail_cnt == 2)
-                               break;
+                               return v;
                }
 
-               /* fiddle with FIFO */
-               rw_mgr_incr_vfifo(grp, &v);
+               /* Fiddle with FIFO. */
+               rw_mgr_incr_vfifo(grp);
        }
 
-       if (v >= VFIFO_SIZE) {
-               /* no failing read found!! Something must have gone wrong */
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: vfifo failed\n",
-                          __func__, __LINE__);
-               return 0;
-       } else {
-               return v;
-       }
+       /* No failing read found! Something must have gone wrong. */
+       debug_cond(DLEVEL == 2, "%s:%d: vfifo failed\n", __func__, __LINE__);
+       return 0;
 }
 
 /**
  * sdr_find_phase() - Find DQS enable phase
  * @working:   If 1, look for working phase, if 0, look for non-working phase
  * @grp:       Read/Write group
- * @v:         VFIFO value
  * @work:      Working window position
  * @i:         Iterator
  * @p:         DQS Phase Iterator
  *
  * Find working or non-working DQS enable phase setting.
  */
-static int sdr_find_phase(int working, const u32 grp, u32 *v, u32 *work,
+static int sdr_find_phase(int working, const u32 grp, u32 *work,
                          u32 *i, u32 *p)
 {
        u32 ret, bit_chk;
@@ -1383,7 +1378,7 @@ static int sdr_find_phase(int working, const u32 grp, u32 *v, u32 *work,
 
                if (*p > IO_DQS_EN_PHASE_MAX) {
                        /* Fiddle with FIFO. */
-                       rw_mgr_incr_vfifo(grp, v);
+                       rw_mgr_incr_vfifo(grp);
                        if (!working)
                                *p = 0;
                }
@@ -1396,14 +1391,13 @@ static int sdr_find_phase(int working, const u32 grp, u32 *v, u32 *work,
  * sdr_working_phase() - Find working DQS enable phase
  * @grp:       Read/Write group
  * @work_bgn:  Working window start position
- * @v:         VFIFO value
  * @d:         dtaps output value
  * @p:         DQS Phase Iterator
  * @i:         Iterator
  *
  * Find working DQS enable phase setting.
  */
-static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *d,
+static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *d,
                             u32 *p, u32 *i)
 {
        const u32 dtaps_per_ptap = IO_DELAY_PER_OPA_TAP /
@@ -1415,7 +1409,7 @@ static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *d,
        for (*d = 0; *d <= dtaps_per_ptap; (*d)++) {
                *i = 0;
                scc_mgr_set_dqs_en_delay_all_ranks(grp, *d);
-               ret = sdr_find_phase(1, grp, v, work_bgn, i, p);
+               ret = sdr_find_phase(1, grp, work_bgn, i, p);
                if (!ret)
                        return 0;
                *work_bgn += IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
@@ -1431,12 +1425,11 @@ static int sdr_working_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *d,
  * sdr_backup_phase() - Find DQS enable backup phase
  * @grp:       Read/Write group
  * @work_bgn:  Working window start position
- * @v:         VFIFO value
  * @p:         DQS Phase Iterator
  *
  * Find DQS enable backup phase setting.
  */
-static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *p)
+static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *p)
 {
        u32 tmp_delay, bit_chk, d;
        int ret;
@@ -1444,7 +1437,7 @@ static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *p)
        /* Special case code for backing up a phase */
        if (*p == 0) {
                *p = IO_DQS_EN_PHASE_MAX;
-               rw_mgr_decr_vfifo(grp, v);
+               rw_mgr_decr_vfifo(grp);
        } else {
                (*p)--;
        }
@@ -1468,7 +1461,7 @@ static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *p)
        (*p)++;
        if (*p > IO_DQS_EN_PHASE_MAX) {
                *p = 0;
-               rw_mgr_incr_vfifo(grp, v);
+               rw_mgr_incr_vfifo(grp);
        }
 
        scc_mgr_set_dqs_en_delay_all_ranks(grp, 0);
@@ -1478,14 +1471,12 @@ static void sdr_backup_phase(const u32 grp, u32 *work_bgn, u32 *v, u32 *p)
  * sdr_nonworking_phase() - Find non-working DQS enable phase
  * @grp:       Read/Write group
  * @work_end:  Working window end position
- * @v:         VFIFO value
  * @p:         DQS Phase Iterator
  * @i:         Iterator
  *
  * Find non-working DQS enable phase setting.
  */
-static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *v,
-                               u32 *p, u32 *i)
+static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *p, u32 *i)
 {
        int ret;
 
@@ -1494,10 +1485,10 @@ static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *v,
        if (*p > IO_DQS_EN_PHASE_MAX) {
                /* Fiddle with FIFO. */
                *p = 0;
-               rw_mgr_incr_vfifo(grp, v);
+               rw_mgr_incr_vfifo(grp);
        }
 
-       ret = sdr_find_phase(0, grp, v, work_end, i, p);
+       ret = sdr_find_phase(0, grp, work_end, i, p);
        if (ret) {
                /* Cannot see edge of failing read. */
                debug_cond(DLEVEL == 2, "%s:%d: end: failed\n",
@@ -1512,14 +1503,13 @@ static int sdr_nonworking_phase(const u32 grp, u32 *work_end, u32 *v,
  * @grp:       Read/Write group
  * @work_bgn:  First working settings
  * @work_end:  Last working settings
- * @val:       VFIFO value
  *
  * Find center of the working DQS enable window.
  */
 static int sdr_find_window_center(const u32 grp, const u32 work_bgn,
-                                 const u32 work_end, const u32 val)
+                                 const u32 work_end)
 {
-       u32 bit_chk, work_mid, v = val;
+       u32 bit_chk, work_mid;
        int tmp_delay = 0;
        int i, p, d;
 
@@ -1556,19 +1546,18 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn,
         * because the largest possible margin in 1 VFIFO cycle.
         */
        for (i = 0; i < VFIFO_SIZE; i++) {
-               debug_cond(DLEVEL == 2, "find_dqs_en_phase: center: vfifo=%u\n",
-                          v);
+               debug_cond(DLEVEL == 2, "find_dqs_en_phase: center\n");
                if (rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1,
                                                             PASS_ONE_BIT,
                                                             &bit_chk, 0)) {
                        debug_cond(DLEVEL == 2,
-                                  "%s:%d center: found: vfifo=%u ptap=%u dtap=%u\n",
-                                  __func__, __LINE__, v, p, d);
+                                  "%s:%d center: found: ptap=%u dtap=%u\n",
+                                  __func__, __LINE__, p, d);
                        return 0;
                }
 
                /* Fiddle with FIFO. */
-               rw_mgr_incr_vfifo(grp, &v);
+               rw_mgr_incr_vfifo(grp);
        }
 
        debug_cond(DLEVEL == 2, "%s:%d center: failed.\n",
@@ -1577,9 +1566,9 @@ static int sdr_find_window_center(const u32 grp, const u32 work_bgn,
 }
 
 /* find a good dqs enable to use */
-static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
+static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(u32 grp)
 {
-       uint32_t v, d, p, i;
+       uint32_t d, p, i;
        uint32_t bit_chk;
        uint32_t dtaps_per_ptap;
        uint32_t work_bgn, work_end;
@@ -1592,47 +1581,44 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
        scc_mgr_set_dqs_en_delay_all_ranks(grp, 0);
        scc_mgr_set_dqs_en_phase_all_ranks(grp, 0);
 
-       /* ************************************************************** */
-       /* * Step 0 : Determine number of delay taps for each phase tap * */
-       dtaps_per_ptap = IO_DELAY_PER_OPA_TAP/IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
+       /* Step 0: Determine number of delay taps for each phase tap. */
+       dtaps_per_ptap = IO_DELAY_PER_OPA_TAP / IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
 
-       /* ********************************************************* */
-       /* * Step 1 : First push vfifo until we get a failing read * */
-       v = find_vfifo_read(grp, &bit_chk);
+       /* Step 1: First push vfifo until we get a failing read. */
+       find_vfifo_failing_read(grp);
 
-       /* ******************************************************** */
-       /* * step 2: find first working phase, increment in ptaps * */
+       /* Step 2: Find first working phase, increment in ptaps. */
        work_bgn = 0;
-       if (sdr_working_phase(grp, &work_bgn, &v, &d, &p, &i))
+       if (sdr_working_phase(grp, &work_bgn, &d, &p, &i))
                return 0;
 
        work_end = work_bgn;
 
        /*
-        * If d is 0 then the working window covers a phase tap and
-        * we can follow the old procedure otherwise, we've found the beginning,
+        * If d is 0 then the working window covers a phase tap and we can
+        * follow the old procedure. Otherwise, we've found the beginning
         * and we need to increment the dtaps until we find the end.
         */
        if (d == 0) {
-               /* ********************************************************* */
-               /* * step 3a: if we have room, back off by one and
-               increment in dtaps * */
-
-               sdr_backup_phase(grp, &work_bgn, &v, &p);
+               /*
+                * Step 3a: If we have room, back off by one and
+                *          increment in dtaps.
+                */
+               sdr_backup_phase(grp, &work_bgn, &p);
 
-               /* ********************************************************* */
-               /* * step 4a: go forward from working phase to non working
-               phase, increment in ptaps * */
-               if (sdr_nonworking_phase(grp, &work_end, &v, &p, &i))
+               /*
+                * Step 4a: go forward from working phase to non working
+                * phase, increment in ptaps.
+                */
+               if (sdr_nonworking_phase(grp, &work_end, &p, &i))
                        return 0;
 
-               /* ********************************************************* */
-               /* * step 5a:  back off one from last, increment in dtaps  * */
+               /* Step 5a: Back off one from last, increment in dtaps. */
 
                /* Special case code for backing up a phase */
                if (p == 0) {
                        p = IO_DQS_EN_PHASE_MAX;
-                       rw_mgr_decr_vfifo(grp, &v);
+                       rw_mgr_decr_vfifo(grp);
                } else {
                        p = p - 1;
                }
@@ -1640,97 +1626,83 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
                work_end -= IO_DELAY_PER_OPA_TAP;
                scc_mgr_set_dqs_en_phase_all_ranks(grp, p);
 
-               /* * The actual increment of dtaps is done outside of
-               the if/else loop to share code */
                d = 0;
 
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: v/p: \
-                          vfifo=%u ptap=%u\n", __func__, __LINE__,
-                          v, p);
-       } else {
-               /* ******************************************************* */
-               /* * step 3-5b:  Find the right edge of the window using
-               delay taps   * */
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase:vfifo=%u \
-                          ptap=%u dtap=%u bgn=%u\n", __func__, __LINE__,
-                          v, p, d, work_bgn);
-
-               work_end = work_bgn;
+               debug_cond(DLEVEL == 2, "%s:%d p: ptap=%u\n",
+                          __func__, __LINE__, p);
        }
 
-       /* The dtap increment to find the failing edge is done here */
-       for (; d <= IO_DQS_EN_DELAY_MAX; d++, work_end +=
-               IO_DELAY_PER_DQS_EN_DCHAIN_TAP) {
-                       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: \
-                                  end-2: dtap=%u\n", __func__, __LINE__, d);
-                       scc_mgr_set_dqs_en_delay_all_ranks(grp, d);
+       /* The dtap increment to find the failing edge is done here. */
+       for (; d <= IO_DQS_EN_DELAY_MAX; d++) {
+               debug_cond(DLEVEL == 2, "%s:%d end-2: dtap=%u\n",
+                          __func__, __LINE__, d);
 
-                       if (!rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1,
-                                                                     PASS_ONE_BIT,
-                                                                     &bit_chk, 0)) {
-                               break;
-                       }
+               scc_mgr_set_dqs_en_delay_all_ranks(grp, d);
+
+               if (!rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1,
+                                                             PASS_ONE_BIT,
+                                                             &bit_chk, 0)) {
+                       break;
+               }
+
+               work_end += IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
        }
 
        /* Go back to working dtap */
        if (d != 0)
                work_end -= IO_DELAY_PER_DQS_EN_DCHAIN_TAP;
 
-       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: v/p/d: vfifo=%u \
-                  ptap=%u dtap=%u end=%u\n", __func__, __LINE__,
-                  v, p, d-1, work_end);
+       debug_cond(DLEVEL == 2,
+                  "%s:%d p/d: ptap=%u dtap=%u end=%u\n",
+                  __func__, __LINE__, p, d - 1, work_end);
 
        if (work_end < work_bgn) {
                /* nil range */
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: end-2: \
-                          failed\n", __func__, __LINE__);
+               debug_cond(DLEVEL == 2, "%s:%d end-2: failed\n",
+                          __func__, __LINE__);
                return 0;
        }
 
-       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: found range [%u,%u]\n",
+       debug_cond(DLEVEL == 2, "%s:%d found range [%u,%u]\n",
                   __func__, __LINE__, work_bgn, work_end);
 
-       /* *************************************************************** */
        /*
-        * * We need to calculate the number of dtaps that equal a ptap
-        * To do that we'll back up a ptap and re-find the edge of the
-        * window using dtaps
+        * We need to calculate the number of dtaps that equal a ptap.
+        * To do that we'll back up a ptap and re-find the edge of the
+        * window using dtaps
         */
-
-       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: calculate dtaps_per_ptap \
-                  for tracking\n", __func__, __LINE__);
+       debug_cond(DLEVEL == 2, "%s:%d calculate dtaps_per_ptap for tracking\n",
+                  __func__, __LINE__);
 
        /* Special case code for backing up a phase */
        if (p == 0) {
                p = IO_DQS_EN_PHASE_MAX;
-               rw_mgr_decr_vfifo(grp, &v);
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: backedup \
-                          cycle/phase: v=%u p=%u\n", __func__, __LINE__,
-                          v, p);
+               rw_mgr_decr_vfifo(grp);
+               debug_cond(DLEVEL == 2, "%s:%d backedup cycle/phase: p=%u\n",
+                          __func__, __LINE__, p);
        } else {
                p = p - 1;
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: backedup \
-                          phase only: v=%u p=%u", __func__, __LINE__,
-                          v, p);
+               debug_cond(DLEVEL == 2, "%s:%d backedup phase only: p=%u",
+                          __func__, __LINE__, p);
        }
 
        scc_mgr_set_dqs_en_phase_all_ranks(grp, p);
 
        /*
         * Increase dtap until we first see a passing read (in case the
-        * window is smaller than a ptap),
-        * and then a failing read to mark the edge of the window again
+        * window is smaller than a ptap), and then a failing read to
+        * mark the edge of the window again.
         */
 
-       /* Find a passing read */
-       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: find passing read\n",
+       /* Find a passing read. */
+       debug_cond(DLEVEL == 2, "%s:%d find passing read\n",
                   __func__, __LINE__);
        found_passing_read = 0;
        found_failing_read = 0;
        initial_failing_dtap = d;
        for (; d <= IO_DQS_EN_DELAY_MAX; d++) {
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: testing \
-                          read d=%u\n", __func__, __LINE__, d);
+               debug_cond(DLEVEL == 2, "%s:%d testing read d=%u\n",
+                          __func__, __LINE__, d);
                scc_mgr_set_dqs_en_delay_all_ranks(grp, d);
 
                if (rw_mgr_mem_calibrate_read_test_all_ranks(grp, 1,
@@ -1742,12 +1714,12 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
        }
 
        if (found_passing_read) {
-               /* Find a failing read */
-               debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: find failing \
-                          read\n", __func__, __LINE__);
+               /* Find a failing read. */
+               debug_cond(DLEVEL == 2, "%s:%d find failing read\n",
+                          __func__, __LINE__);
                for (d = d + 1; d <= IO_DQS_EN_DELAY_MAX; d++) {
-                       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: \
-                                  testing read d=%u\n", __func__, __LINE__, d);
+                       debug_cond(DLEVEL == 2, "%s:%d testing read d=%u\n",
+                                  __func__, __LINE__, d);
                        scc_mgr_set_dqs_en_delay_all_ranks(grp, d);
 
                        if (!rw_mgr_mem_calibrate_read_test_all_ranks
@@ -1757,9 +1729,9 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
                        }
                }
        } else {
-               debug_cond(DLEVEL == 1, "%s:%d find_dqs_en_phase: failed to \
-                          calculate dtaps", __func__, __LINE__);
-               debug_cond(DLEVEL == 1, "per ptap. Fall back on static value\n");
+               debug_cond(DLEVEL == 1,
+                          "%s:%d failed to calculate dtaps per ptap. Fall back on static value\n",
+                          __func__, __LINE__);
        }
 
        /*
@@ -1772,14 +1744,12 @@ static uint32_t rw_mgr_mem_calibrate_vfifo_find_dqs_en_phase(uint32_t grp)
                dtaps_per_ptap = d - initial_failing_dtap;
 
        writel(dtaps_per_ptap, &sdr_reg_file->dtaps_per_ptap);
-       debug_cond(DLEVEL == 2, "%s:%d find_dqs_en_phase: dtaps_per_ptap=%u \
-                  - %u = %u",  __func__, __LINE__, d,
-                  initial_failing_dtap, dtaps_per_ptap);
-
-       /* ******************************************** */
-       /* * step 6:  Find the centre of the window   * */
-       if (sdr_find_window_centre(grp, work_bgn, work_end, v))
-               return 0; /* FIXME: Old code, return 0 means failure :-( */
+       debug_cond(DLEVEL == 2, "%s:%d dtaps_per_ptap=%u - %u = %u",
+                  __func__, __LINE__, d, initial_failing_dtap, dtaps_per_ptap);
+
+       /* Step 6: Find the centre of the window. */
+       if (sdr_find_window_centre(grp, work_bgn, work_end))
+               return 0;
 
        return 1;
 }