]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - drivers/ddr/fsl/lc_common_dimm_params.c
Add more SPDX-License-Identifier tags
[people/ms/u-boot.git] / drivers / ddr / fsl / lc_common_dimm_params.c
index 05a24dd6efdba2658cfcf68898dd7f7948edb922..47ad4e542db9d005518bcc4ba5650ebb6075891c 100644 (file)
@@ -1,9 +1,7 @@
 /*
  * Copyright 2008-2014 Freescale Semiconductor, Inc.
  *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * Version 2 as published by the Free Software Foundation.
+ * SPDX-License-Identifier:    GPL-2.0
  */
 
 #include <common.h>
@@ -13,7 +11,8 @@
 
 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
 static unsigned int
-compute_cas_latency(const dimm_params_t *dimm_params,
+compute_cas_latency(const unsigned int ctrl_num,
+                   const dimm_params_t *dimm_params,
                    common_timing_params_t *outpdimm,
                    unsigned int number_of_dimms)
 {
@@ -21,8 +20,8 @@ compute_cas_latency(const dimm_params_t *dimm_params,
        unsigned int common_caslat;
        unsigned int caslat_actual;
        unsigned int retry = 16;
-       unsigned int tmp;
-       const unsigned int mclk_ps = get_memory_clk_period_ps();
+       unsigned int tmp = ~0;
+       const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num);
 #ifdef CONFIG_SYS_FSL_DDR3
        const unsigned int taamax = 20000;
 #else
@@ -30,8 +29,7 @@ compute_cas_latency(const dimm_params_t *dimm_params,
 #endif
 
        /* compute the common CAS latency supported between slots */
-       tmp = dimm_params[0].caslat_x;
-       for (i = 1; i < number_of_dimms; i++) {
+       for (i = 0; i < number_of_dimms; i++) {
                if (dimm_params[i].n_ranks)
                        tmp &= dimm_params[i].caslat_x;
        }
@@ -72,12 +70,13 @@ compute_cas_latency(const dimm_params_t *dimm_params,
 }
 #else  /* for DDR1 and DDR2 */
 static unsigned int
-compute_cas_latency(const dimm_params_t *dimm_params,
+compute_cas_latency(const unsigned int ctrl_num,
+                   const dimm_params_t *dimm_params,
                    common_timing_params_t *outpdimm,
                    unsigned int number_of_dimms)
 {
        int i;
-       const unsigned int mclk_ps = get_memory_clk_period_ps();
+       const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num);
        unsigned int lowest_good_caslat;
        unsigned int not_ok;
        unsigned int temp1, temp2;
@@ -212,7 +211,8 @@ compute_cas_latency(const dimm_params_t *dimm_params,
  * by dimm_params.
  */
 unsigned int
-compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
+compute_lowest_common_dimm_parameters(const unsigned int ctrl_num,
+                                     const dimm_params_t *dimm_params,
                                      common_timing_params_t *outpdimm,
                                      const unsigned int number_of_dimms)
 {
@@ -289,48 +289,58 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
                 * Find minimum tckmax_ps to find fastest slow speed,
                 * i.e., this is the slowest the whole system can go.
                 */
-               tckmax_ps = min(tckmax_ps, dimm_params[i].tckmax_ps);
+               tckmax_ps = min(tckmax_ps,
+                               (unsigned int)dimm_params[i].tckmax_ps);
 #if defined(CONFIG_SYS_FSL_DDR3) || defined(CONFIG_SYS_FSL_DDR4)
-               taamin_ps = max(taamin_ps, dimm_params[i].taa_ps);
+               taamin_ps = max(taamin_ps,
+                               (unsigned int)dimm_params[i].taa_ps);
 #endif
-               tckmin_x_ps = max(tckmin_x_ps, dimm_params[i].tckmin_x_ps);
-               trcd_ps = max(trcd_ps, dimm_params[i].trcd_ps);
-               trp_ps = max(trp_ps, dimm_params[i].trp_ps);
-               tras_ps = max(tras_ps, dimm_params[i].tras_ps);
+               tckmin_x_ps = max(tckmin_x_ps,
+                                 (unsigned int)dimm_params[i].tckmin_x_ps);
+               trcd_ps = max(trcd_ps, (unsigned int)dimm_params[i].trcd_ps);
+               trp_ps = max(trp_ps, (unsigned int)dimm_params[i].trp_ps);
+               tras_ps = max(tras_ps, (unsigned int)dimm_params[i].tras_ps);
 #ifdef CONFIG_SYS_FSL_DDR4
-               trfc1_ps = max(trfc1_ps, dimm_params[i].trfc1_ps);
-               trfc2_ps = max(trfc2_ps, dimm_params[i].trfc2_ps);
-               trfc4_ps = max(trfc4_ps, dimm_params[i].trfc4_ps);
-               trrds_ps = max(trrds_ps, dimm_params[i].trrds_ps);
-               trrdl_ps = max(trrdl_ps, dimm_params[i].trrdl_ps);
-               tccdl_ps = max(tccdl_ps, dimm_params[i].tccdl_ps);
+               trfc1_ps = max(trfc1_ps,
+                              (unsigned int)dimm_params[i].trfc1_ps);
+               trfc2_ps = max(trfc2_ps,
+                              (unsigned int)dimm_params[i].trfc2_ps);
+               trfc4_ps = max(trfc4_ps,
+                              (unsigned int)dimm_params[i].trfc4_ps);
+               trrds_ps = max(trrds_ps,
+                              (unsigned int)dimm_params[i].trrds_ps);
+               trrdl_ps = max(trrdl_ps,
+                              (unsigned int)dimm_params[i].trrdl_ps);
+               tccdl_ps = max(tccdl_ps,
+                              (unsigned int)dimm_params[i].tccdl_ps);
 #else
-               twr_ps = max(twr_ps, dimm_params[i].twr_ps);
-               twtr_ps = max(twtr_ps, dimm_params[i].twtr_ps);
-               trfc_ps = max(trfc_ps, dimm_params[i].trfc_ps);
-               trrd_ps = max(trrd_ps, dimm_params[i].trrd_ps);
-               trtp_ps = max(trtp_ps, dimm_params[i].trtp_ps);
+               twr_ps = max(twr_ps, (unsigned int)dimm_params[i].twr_ps);
+               twtr_ps = max(twtr_ps, (unsigned int)dimm_params[i].twtr_ps);
+               trfc_ps = max(trfc_ps, (unsigned int)dimm_params[i].trfc_ps);
+               trrd_ps = max(trrd_ps, (unsigned int)dimm_params[i].trrd_ps);
+               trtp_ps = max(trtp_ps, (unsigned int)dimm_params[i].trtp_ps);
 #endif
-               trc_ps = max(trc_ps, dimm_params[i].trc_ps);
+               trc_ps = max(trc_ps, (unsigned int)dimm_params[i].trc_ps);
 #if defined(CONFIG_SYS_FSL_DDR1) || defined(CONFIG_SYS_FSL_DDR2)
-               tis_ps = max(tis_ps, dimm_params[i].tis_ps);
-               tih_ps = max(tih_ps, dimm_params[i].tih_ps);
-               tds_ps = max(tds_ps, dimm_params[i].tds_ps);
-               tdh_ps = max(tdh_ps, dimm_params[i].tdh_ps);
-               tqhs_ps = max(tqhs_ps, dimm_params[i].tqhs_ps);
+               tis_ps = max(tis_ps, (unsigned int)dimm_params[i].tis_ps);
+               tih_ps = max(tih_ps, (unsigned int)dimm_params[i].tih_ps);
+               tds_ps = max(tds_ps, (unsigned int)dimm_params[i].tds_ps);
+               tdh_ps = max(tdh_ps, (unsigned int)dimm_params[i].tdh_ps);
+               tqhs_ps = max(tqhs_ps, (unsigned int)dimm_params[i].tqhs_ps);
                /*
                 * Find maximum tdqsq_max_ps to find slowest.
                 *
                 * FIXME: is finding the slowest value the correct
                 * strategy for this parameter?
                 */
-               tdqsq_max_ps = max(tdqsq_max_ps, dimm_params[i].tdqsq_max_ps);
+               tdqsq_max_ps = max(tdqsq_max_ps,
+                                  (unsigned int)dimm_params[i].tdqsq_max_ps);
 #endif
                refresh_rate_ps = max(refresh_rate_ps,
-                                     dimm_params[i].refresh_rate_ps);
+                                     (unsigned int)dimm_params[i].refresh_rate_ps);
                /* extended_op_srt is either 0 or 1, 0 having priority */
                extended_op_srt = min(extended_op_srt,
-                                     dimm_params[i].extended_op_srt);
+                                     (unsigned int)dimm_params[i].extended_op_srt);
        }
 
        outpdimm->ndimms_present = number_of_dimms - temp1;
@@ -432,7 +442,8 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
                printf("ERROR: Mix different RDIMM detected!\n");
 
        /* calculate cas latency for all DDR types */
-       if (compute_cas_latency(dimm_params, outpdimm, number_of_dimms))
+       if (compute_cas_latency(ctrl_num, dimm_params,
+                               outpdimm, number_of_dimms))
                return 1;
 
        /* Determine if all DIMMs ECC capable. */
@@ -508,11 +519,12 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
 
 #if defined(CONFIG_SYS_FSL_DDR2)
        if ((outpdimm->lowest_common_spd_caslat < 4) &&
-           (picos_to_mclk(trcd_ps) > outpdimm->lowest_common_spd_caslat)) {
-               additive_latency = picos_to_mclk(trcd_ps) -
+           (picos_to_mclk(ctrl_num, trcd_ps) >
+            outpdimm->lowest_common_spd_caslat)) {
+               additive_latency = picos_to_mclk(ctrl_num, trcd_ps) -
                                   outpdimm->lowest_common_spd_caslat;
-               if (mclk_to_picos(additive_latency) > trcd_ps) {
-                       additive_latency = picos_to_mclk(trcd_ps);
+               if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) {
+                       additive_latency = picos_to_mclk(ctrl_num, trcd_ps);
                        debug("setting additive_latency to %u because it was "
                                " greater than tRCD_ps\n", additive_latency);
                }
@@ -524,7 +536,7 @@ compute_lowest_common_dimm_parameters(const dimm_params_t *dimm_params,
         *
         * AL <= tRCD(min)
         */
-       if (mclk_to_picos(additive_latency) > trcd_ps) {
+       if (mclk_to_picos(ctrl_num, additive_latency) > trcd_ps) {
                printf("Error: invalid additive latency exceeds tRCD(min).\n");
                return 1;
        }