Convert CONFIG_BOOTCOUNT_RAM to Kconfig

[people/ms/u-boot.git] / drivers / dma / apbh_dma.c

diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c
index 96d4c9bb19960c943fa0666768e30212d996f139..fea8767d7bae5b65013dc33c3b7506748247f646 100644 (file)
--- a/drivers/dma/apbh_dma.c
+++ b/drivers/dma/apbh_dma.c
@@ -14,13 +14,13 @@
 
 #include <common.h>
 #include <malloc.h>
-#include <asm/errno.h>
+#include <linux/errno.h>
 #include <asm/io.h>
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/sys_proto.h>
-#include <asm/imx-common/dma.h>
-#include <asm/imx-common/regs-apbh.h>
+#include <asm/mach-imx/dma.h>
+#include <asm/mach-imx/regs-apbh.h>
 
 static struct mxs_dma_chan mxs_dma_channels[MXS_MAX_DMA_CHANNELS];
 
@@ -215,7 +215,7 @@ static int mxs_dma_reset(int channel)
 #if defined(CONFIG_MX23)
        uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_ctrl0_set);
        uint32_t offset = APBH_CTRL0_RESET_CHANNEL_OFFSET;
-#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6))
+#elif (defined(CONFIG_MX28) || defined(CONFIG_MX6) || defined(CONFIG_MX7))
        uint32_t setreg = (uint32_t)(&apbh_regs->hw_apbh_channel_ctrl_set);
        uint32_t offset = APBH_CHANNEL_CTRL_RESET_CHANNEL_OFFSET;
 #endif
@@ -544,6 +544,28 @@ int mxs_dma_go(int chan)
        return ret;
 }
 
+/*
+ * Execute a continuously running circular DMA descriptor.
+ * NOTE: This is not intended for general use, but rather
+ *      for the LCD driver in Smart-LCD mode. It allows
+ *      continuous triggering of the RUN bit there.
+ */
+void mxs_dma_circ_start(int chan, struct mxs_dma_desc *pdesc)
+{
+       struct mxs_apbh_regs *apbh_regs =
+               (struct mxs_apbh_regs *)MXS_APBH_BASE;
+
+       mxs_dma_flush_desc(pdesc);
+
+       mxs_dma_enable_irq(chan, 1);
+
+       writel(mxs_dma_cmd_address(pdesc),
+               &apbh_regs->ch[chan].hw_apbh_ch_nxtcmdar);
+       writel(1, &apbh_regs->ch[chan].hw_apbh_ch_sema);
+       writel(1 << (chan + APBH_CTRL0_CLKGATE_CHANNEL_OFFSET),
+               &apbh_regs->hw_apbh_ctrl0_clr);
+}
+
 /*
  * Initialize the DMA hardware
  */