net: ravb: Initialize PHY in probe() once

[people/ms/u-boot.git] / drivers / mmc / mmc.c

diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 5255c0dccfc24ace69592d4014fe7c2e8d6d33db..255310a8e619c1e229f883a25c07455b872e19d7 100644 (file)
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -22,14 +22,6 @@
 #include <div64.h>
 #include "mmc_private.h"
 
-static const unsigned int sd_au_size[] = {
-       0,              SZ_16K / 512,           SZ_32K / 512,
-       SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
-       SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
-       SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
-       SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,   SZ_64M / 512,
-};
-
 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
 static int mmc_power_cycle(struct mmc *mmc);
 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
@@ -1376,8 +1368,17 @@ int sd_select_bus_width(struct mmc *mmc, int w)
        return 0;
 }
 
+#if CONFIG_IS_ENABLED(MMC_WRITE)
 static int sd_read_ssr(struct mmc *mmc)
 {
+       static const unsigned int sd_au_size[] = {
+               0,              SZ_16K / 512,           SZ_32K / 512,
+               SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
+               SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
+               SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
+               SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
+               SZ_64M / 512,
+       };
        int err, i;
        struct mmc_cmd cmd;
        ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
@@ -1431,7 +1432,7 @@ retry_ssr:
 
        return 0;
 }
-
+#endif
 /* frequency bases */
 /* divided by 10 to be nice to platforms without floating point */
 static const int fbase[] = {
@@ -1500,11 +1501,13 @@ static int mmc_set_ios(struct mmc *mmc)
 
 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
 {
-       if (clock > mmc->cfg->f_max)
-               clock = mmc->cfg->f_max;
+       if (!disable) {
+               if (clock > mmc->cfg->f_max)
+                       clock = mmc->cfg->f_max;
 
-       if (clock < mmc->cfg->f_min)
-               clock = mmc->cfg->f_min;
+               if (clock < mmc->cfg->f_min)
+                       clock = mmc->cfg->f_min;
+       }
 
        mmc->clock = clock;
        mmc->clk_disable = disable;
@@ -1689,12 +1692,14 @@ static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
                                }
 #endif
 
+#if CONFIG_IS_ENABLED(MMC_WRITE)
                                err = sd_read_ssr(mmc);
+                               if (!err)
+                                       pr_warn("unable to read ssr\n");
+#endif
                                if (!err)
                                        return 0;
 
-                               pr_warn("bad ssr\n");
-
 error:
                                /* revert to a safer bus speed */
                                mmc_select_mode(mmc, SD_LEGACY);
@@ -2025,6 +2030,7 @@ static int mmc_startup_v4(struct mmc *mmc)
                mmc->capacity_gp[i] <<= 19;
        }
 
+#ifndef CONFIG_SPL_BUILD
        if (part_completed) {
                mmc->enh_user_size =
                        (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
@@ -2041,6 +2047,7 @@ static int mmc_startup_v4(struct mmc *mmc)
                if (mmc->high_capacity)
                        mmc->enh_user_start <<= 9;
        }
+#endif
 
        /*
         * Host needs to enable ERASE_GRP_DEF bit if device is
@@ -2063,9 +2070,11 @@ static int mmc_startup_v4(struct mmc *mmc)
        }
 
        if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
+#if CONFIG_IS_ENABLED(MMC_WRITE)
                /* Read out group size from ext_csd */
                mmc->erase_grp_size =
                        ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
+#endif
                /*
                 * if high capacity and partition setting completed
                 * SEC_COUNT is valid even if it is smaller than 2 GiB
@@ -2079,7 +2088,9 @@ static int mmc_startup_v4(struct mmc *mmc)
                        capacity *= MMC_MAX_BLOCK_LEN;
                        mmc->capacity_user = capacity;
                }
-       } else {
+       }
+#if CONFIG_IS_ENABLED(MMC_WRITE)
+       else {
                /* Calculate the group size from the csd value. */
                int erase_gsz, erase_gmul;
 
@@ -2088,10 +2099,12 @@ static int mmc_startup_v4(struct mmc *mmc)
                mmc->erase_grp_size = (erase_gsz + 1)
                        * (erase_gmul + 1);
        }
-
+#endif
+#if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
        mmc->hc_wp_grp_size = 1024
                * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
                * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
+#endif
 
        mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
 
@@ -2219,11 +2232,13 @@ static int mmc_startup(struct mmc *mmc)
 
        mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
        mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
+#if CONFIG_IS_ENABLED(MMC_WRITE)
 
        if (IS_SD(mmc))
                mmc->write_bl_len = mmc->read_bl_len;
        else
                mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
+#endif
 
        if (mmc->high_capacity) {
                csize = (mmc->csd[1] & 0x3f) << 16
@@ -2245,8 +2260,10 @@ static int mmc_startup(struct mmc *mmc)
        if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
                mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
 
+#if CONFIG_IS_ENABLED(MMC_WRITE)
        if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
                mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
+#endif
 
        if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
                cmd.cmdidx = MMC_CMD_SET_DSR;
@@ -2270,7 +2287,9 @@ static int mmc_startup(struct mmc *mmc)
        /*
         * For SD, its erase group is always one sector
         */
+#if CONFIG_IS_ENABLED(MMC_WRITE)
        mmc->erase_grp_size = 1;
+#endif
        mmc->part_config = MMCPART_NOAVAILABLE;
 
        err = mmc_startup_v4(mmc);
@@ -2301,7 +2320,9 @@ static int mmc_startup(struct mmc *mmc)
        /* Fix the block length for DDR mode */
        if (mmc->ddr_mode) {
                mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
+#if CONFIG_IS_ENABLED(MMC_WRITE)
                mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
+#endif
        }
 
        /* fill in device description */
@@ -2430,7 +2451,7 @@ static int mmc_power_on(struct mmc *mmc)
 
 static int mmc_power_off(struct mmc *mmc)
 {
-       mmc_set_clock(mmc, 1, true);
+       mmc_set_clock(mmc, 0, true);
 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
        if (mmc->vmmc_supply) {
                int ret = regulator_set_enable(mmc->vmmc_supply, false);
@@ -2472,8 +2493,12 @@ int mmc_start_init(struct mmc *mmc)
        mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) |
                         MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
 
+#if !defined(CONFIG_MMC_BROKEN_CD)
        /* we pretend there's no card when init is NULL */
        no_card = mmc_getcd(mmc) == 0;
+#else
+       no_card = 0;
+#endif
 #if !CONFIG_IS_ENABLED(DM_MMC)
        no_card = no_card || (mmc->cfg->ops->init == NULL);
 #endif