#endif
uint bus_width;
uint clock;
+ ushort last_cmd;
#ifdef OMAP_HSMMC_USE_GPIO
#if CONFIG_IS_ENABLED(DM_MMC)
struct gpio_desc cd_gpio; /* Change Detect GPIO */
#endif
#endif
#if CONFIG_IS_ENABLED(DM_MMC)
- uint iov;
enum bus_mode mode;
#endif
u8 controller_flags;
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
struct omap_hsmmc_adma_desc *adma_desc_table;
uint desc_slot;
#endif
const char *hw_rev;
+ struct udevice *pbias_supply;
+ uint signal_voltage;
#ifdef CONFIG_IODELAY_RECALIBRATION
struct omap_hsmmc_pinctrl_state *default_pinctrl_state;
struct omap_hsmmc_pinctrl_state *hs_pinctrl_state;
u8 controller_flags;
};
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
struct omap_hsmmc_adma_desc {
u8 attr;
u8 reserved;
&prcm_base->iclken1_core);
#endif
-#if defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)
+#if (defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)) &&\
+ !CONFIG_IS_ENABLED(DM_REGULATOR)
/* PBIAS config needed for MMC1 only */
if (mmc_get_blk_desc(mmc)->devnum == 0)
vmmc_pbias_config(LDO_VOLT_3V0);
omap_hsmmc_start_clock(mmc_base);
}
-static void omap_hsmmc_conf_bus_power(struct mmc *mmc)
+static void omap_hsmmc_conf_bus_power(struct mmc *mmc, uint signal_voltage)
{
struct hsmmc *mmc_base;
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
- u32 val;
+ u32 hctl, ac12;
mmc_base = priv->base_addr;
- val = readl(&mmc_base->hctl) & ~SDVS_MASK;
+ hctl = readl(&mmc_base->hctl) & ~SDVS_MASK;
+ ac12 = readl(&mmc_base->ac12) & ~AC12_V1V8_SIGEN;
- switch (priv->iov) {
- case IOV_3V3:
- val |= SDVS_3V3;
- break;
- case IOV_3V0:
- val |= SDVS_3V0;
+ switch (signal_voltage) {
+ case MMC_SIGNAL_VOLTAGE_330:
+ hctl |= SDVS_3V0;
break;
- case IOV_1V8:
- val |= SDVS_1V8;
+ case MMC_SIGNAL_VOLTAGE_180:
+ hctl |= SDVS_1V8;
+ ac12 |= AC12_V1V8_SIGEN;
break;
}
- writel(val, &mmc_base->hctl);
+ writel(hctl, &mmc_base->hctl);
+ writel(ac12, &mmc_base->ac12);
+}
+
+#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
+static int omap_hsmmc_wait_dat0(struct udevice *dev, int state, int timeout)
+{
+ int ret = -ETIMEDOUT;
+ u32 con;
+ bool dat0_high;
+ bool target_dat0_high = !!state;
+ struct omap_hsmmc_data *priv = dev_get_priv(dev);
+ struct hsmmc *mmc_base = priv->base_addr;
+
+ con = readl(&mmc_base->con);
+ writel(con | CON_CLKEXTFREE | CON_PADEN, &mmc_base->con);
+
+ timeout = DIV_ROUND_UP(timeout, 10); /* check every 10 us. */
+ while (timeout--) {
+ dat0_high = !!(readl(&mmc_base->pstate) & PSTATE_DLEV_DAT0);
+ if (dat0_high == target_dat0_high) {
+ ret = 0;
+ break;
+ }
+ udelay(10);
+ }
+ writel(con, &mmc_base->con);
+
+ return ret;
}
+#endif
-static void omap_hsmmc_set_capabilities(struct mmc *mmc)
+#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+static int omap_hsmmc_set_io_regulator(struct mmc *mmc, int mV)
+{
+ int ret = 0;
+ int uV = mV * 1000;
+
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+
+ if (!mmc->vqmmc_supply)
+ return 0;
+
+ /* Disable PBIAS */
+ ret = regulator_set_enable(priv->pbias_supply, false);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ /* Turn off IO voltage */
+ ret = regulator_set_enable(mmc->vqmmc_supply, false);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ /* Program a new IO voltage value */
+ ret = regulator_set_value(mmc->vqmmc_supply, uV);
+ if (ret)
+ return ret;
+ /* Turn on IO voltage */
+ ret = regulator_set_enable(mmc->vqmmc_supply, true);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ /* Program PBIAS voltage*/
+ ret = regulator_set_value(priv->pbias_supply, uV);
+ if (ret && ret != -ENOSYS)
+ return ret;
+ /* Enable PBIAS */
+ ret = regulator_set_enable(priv->pbias_supply, true);
+ if (ret && ret != -ENOSYS)
+ return ret;
+
+ return 0;
+}
+#endif
+
+static int omap_hsmmc_set_signal_voltage(struct mmc *mmc)
+{
+ struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
+ struct hsmmc *mmc_base = priv->base_addr;
+ int mv = mmc_voltage_to_mv(mmc->signal_voltage);
+ u32 capa_mask;
+ __maybe_unused u8 palmas_ldo_volt;
+ u32 val;
+
+ if (mv < 0)
+ return -EINVAL;
+
+ if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
+ /* Use 3.0V rather than 3.3V */
+ mv = 3000;
+ capa_mask = VS30_3V0SUP;
+ palmas_ldo_volt = LDO_VOLT_3V0;
+ } else if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) {
+ capa_mask = VS18_1V8SUP;
+ palmas_ldo_volt = LDO_VOLT_1V8;
+ } else {
+ return -EOPNOTSUPP;
+ }
+
+ val = readl(&mmc_base->capa);
+ if (!(val & capa_mask))
+ return -EOPNOTSUPP;
+
+ priv->signal_voltage = mmc->signal_voltage;
+
+ omap_hsmmc_conf_bus_power(mmc, mmc->signal_voltage);
+
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ return omap_hsmmc_set_io_regulator(mmc, mv);
+#elif (defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX)) && \
+ defined(CONFIG_PALMAS_POWER)
+ if (mmc_get_blk_desc(mmc)->devnum == 0)
+ vmmc_pbias_config(palmas_ldo_volt);
+ return 0;
+#else
+ return 0;
+#endif
+}
+#endif
+
+static uint32_t omap_hsmmc_set_capabilities(struct mmc *mmc)
{
struct hsmmc *mmc_base;
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
if (priv->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
val |= (VS30_3V0SUP | VS18_1V8SUP);
- priv->iov = IOV_3V0;
} else if (priv->controller_flags & OMAP_HSMMC_NO_1_8_V) {
val |= VS30_3V0SUP;
val &= ~VS18_1V8SUP;
- priv->iov = IOV_3V0;
} else {
val |= VS18_1V8SUP;
val &= ~VS30_3V0SUP;
- priv->iov = IOV_1V8;
}
writel(val, &mmc_base->capa);
+
+ return val;
}
#ifdef MMC_SUPPORTS_TUNING
return -ETIMEDOUT;
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
reg_val = readl(&mmc_base->hl_hwinfo);
if (reg_val & MADMA_EN)
priv->controller_flags |= OMAP_HSMMC_USE_ADMA;
#endif
#if CONFIG_IS_ENABLED(DM_MMC)
- omap_hsmmc_set_capabilities(mmc);
- omap_hsmmc_conf_bus_power(mmc);
+ reg_val = omap_hsmmc_set_capabilities(mmc);
+ omap_hsmmc_conf_bus_power(mmc, (reg_val & VS30_3V0SUP) ?
+ MMC_SIGNAL_VOLTAGE_330 : MMC_SIGNAL_VOLTAGE_180);
#else
writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl);
writel(readl(&mmc_base->capa) | VS30_3V0SUP | VS18_1V8SUP,
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
static void omap_hsmmc_adma_desc(struct mmc *mmc, char *buf, u16 len, bool end)
{
struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc);
struct hsmmc *mmc_base;
unsigned int flags, mmc_stat;
ulong start;
+ priv->last_cmd = cmd->cmdidx;
mmc_base = priv->base_addr;
else
flags |= (DP_DATA | DDIR_WRITE);
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) &&
!mmc_is_tuning_cmd(cmd->cmdidx)) {
omap_hsmmc_prepare_data(mmc, data);
}
}
-#ifndef CONFIG_OMAP34XX
+#ifdef CONFIG_MMC_OMAP_HS_ADMA
if ((priv->controller_flags & OMAP_HSMMC_USE_ADMA) && data &&
!mmc_is_tuning_cmd(cmd->cmdidx)) {
u32 sz_mb, timeout;
return 0;
}
+#if CONFIG_IS_ENABLED(MMC_WRITE)
static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
- unsigned int size)
+ unsigned int size)
{
unsigned int *input_buf = (unsigned int *)buf;
unsigned int mmc_stat;
}
return 0;
}
-
+#else
+static int mmc_write_data(struct hsmmc *mmc_base, const char *buf,
+ unsigned int size)
+{
+ return -ENOTSUPP;
+}
+#endif
static void omap_hsmmc_stop_clock(struct hsmmc *mmc_base)
{
writel(readl(&mmc_base->sysctl) & ~CEN_ENABLE, &mmc_base->sysctl);
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
struct mmc *mmc = upriv->mmc;
#endif
+ struct hsmmc *mmc_base = priv->base_addr;
+ int ret = 0;
if (priv->bus_width != mmc->bus_width)
omap_hsmmc_set_bus_width(mmc);
if (priv->clock != mmc->clock)
omap_hsmmc_set_clock(mmc);
+ if (mmc->clk_disable)
+ omap_hsmmc_stop_clock(mmc_base);
+ else
+ omap_hsmmc_start_clock(mmc_base);
+
#if CONFIG_IS_ENABLED(DM_MMC)
if (priv->mode != mmc->selected_mode)
omap_hsmmc_set_timing(mmc);
+
+#if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
+ if (priv->signal_voltage != mmc->signal_voltage)
+ ret = omap_hsmmc_set_signal_voltage(mmc);
#endif
- return 0;
+#endif
+ return ret;
}
#ifdef OMAP_HSMMC_USE_GPIO
.execute_tuning = omap_hsmmc_execute_tuning,
#endif
.send_init_stream = omap_hsmmc_send_init_stream,
+#if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
+ .wait_dat0 = omap_hsmmc_wait_dat0,
+#endif
};
#else
static const struct mmc_ops omap_hsmmc_ops = {
struct mmc_config *cfg;
uint host_caps_val;
- priv = malloc(sizeof(*priv));
+ priv = calloc(1, sizeof(*priv));
if (priv == NULL)
return -1;
if (ret < 0)
return ret;
+ if (!cfg->f_max)
+ cfg->f_max = 52000000;
cfg->host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
cfg->f_min = 400000;
cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
static int omap_hsmmc_bind(struct udevice *dev)
{
struct omap_hsmmc_plat *plat = dev_get_platdata(dev);
-
- return mmc_bind(dev, &plat->mmc, &plat->cfg);
+ plat->mmc = calloc(1, sizeof(struct mmc));
+ return mmc_bind(dev, plat->mmc, &plat->cfg);
}
#endif
static int omap_hsmmc_probe(struct udevice *dev)
#endif
#ifdef CONFIG_BLK
- mmc = &plat->mmc;
+ mmc = plat->mmc;
#else
mmc = mmc_create(cfg, priv);
if (mmc == NULL)
return -1;
#endif
-
+#if CONFIG_IS_ENABLED(DM_REGULATOR)
+ device_get_supply_regulator(dev, "pbias-supply",
+ &priv->pbias_supply);
+#endif
#if defined(OMAP_HSMMC_USE_GPIO) && CONFIG_IS_ENABLED(OF_CONTROL)
gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN);
gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN);
projects / people / ms / u-boot.git / blobdiff