mtd: nand: Add page argument to write_page() etc.

[people/ms/u-boot.git] / drivers / mtd / nand / mxs_nand.c

diff --git a/drivers/mtd/nand/mxs_nand.c b/drivers/mtd/nand/mxs_nand.c
index 1d689015a5a2294a1b7aa8bc3fe87575e0f5cc7d..5291330b911c9824f587b6fc714e269bb31766ca 100644 (file)
--- a/drivers/mtd/nand/mxs_nand.c
+++ b/drivers/mtd/nand/mxs_nand.c
@@ -30,7 +30,7 @@
 #define        MXS_NAND_DMA_DESCRIPTOR_COUNT           4
 
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE          512
-#if defined(CONFIG_MX6)
+#if (defined(CONFIG_MX6) || defined(CONFIG_MX7))
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    2
 #else
 #define        MXS_NAND_CHUNK_DATA_CHUNK_SIZE_SHIFT    0
@@ -149,6 +149,13 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
                                                uint32_t page_oob_size)
 {
        int ecc_strength;
+       int max_ecc_strength_supported;
+
+       /* Refer to Chapter 17 for i.MX6DQ, Chapter 18 for i.MX6SX */
+       if (is_cpu_type(MXC_CPU_MX6SX) || is_soc_type(MXC_SOC_MX7))
+               max_ecc_strength_supported = 62;
+       else
+               max_ecc_strength_supported = 40;
 
        /*
         * Determine the ECC layout with the formula:
@@ -162,7 +169,7 @@ static inline uint32_t mxs_nand_get_ecc_strength(uint32_t page_data_size,
                        / (galois_field *
                           mxs_nand_ecc_chunk_cnt(page_data_size));
 
-       return round_down(ecc_strength, 2);
+       return min(round_down(ecc_strength, 2), max_ecc_strength_supported);
 }
 
 static inline uint32_t mxs_nand_get_mark_offset(uint32_t page_data_size,
@@ -257,8 +264,8 @@ static int mxs_nand_wait_for_bch_complete(void)
  */
 static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
 {
-       struct nand_chip *nand = mtd->priv;
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct nand_chip *nand = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_dma_desc *d;
        uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
        int ret;
@@ -336,8 +343,8 @@ static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
  */
 static int mxs_nand_device_ready(struct mtd_info *mtd)
 {
-       struct nand_chip *chip = mtd->priv;
-       struct mxs_nand_info *nand_info = chip->priv;
+       struct nand_chip *chip = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
        struct mxs_gpmi_regs *gpmi_regs =
                (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
        uint32_t tmp;
@@ -353,8 +360,8 @@ static int mxs_nand_device_ready(struct mtd_info *mtd)
  */
 static void mxs_nand_select_chip(struct mtd_info *mtd, int chip)
 {
-       struct nand_chip *nand = mtd->priv;
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct nand_chip *nand = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
 
        nand_info->cur_chip = chip;
 }
@@ -403,8 +410,8 @@ static void mxs_nand_swap_block_mark(struct mtd_info *mtd,
  */
 static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int length)
 {
-       struct nand_chip *nand = mtd->priv;
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct nand_chip *nand = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_dma_desc *d;
        uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
        int ret;
@@ -487,8 +494,8 @@ rtn:
 static void mxs_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
                                int length)
 {
-       struct nand_chip *nand = mtd->priv;
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct nand_chip *nand = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_dma_desc *d;
        uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
        int ret;
@@ -552,7 +559,7 @@ static int mxs_nand_ecc_read_page(struct mtd_info *mtd, struct nand_chip *nand,
                                        uint8_t *buf, int oob_required,
                                        int page)
 {
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_dma_desc *d;
        uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
        uint32_t corrected = 0, failed = 0;
@@ -700,9 +707,9 @@ rtn:
  */
 static int mxs_nand_ecc_write_page(struct mtd_info *mtd,
                                struct nand_chip *nand, const uint8_t *buf,
-                               int oob_required)
+                               int oob_required, int page)
 {
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_dma_desc *d;
        uint32_t channel = MXS_DMA_CHANNEL_AHB_APBH_GPMI0 + nand_info->cur_chip;
        int ret;
@@ -768,8 +775,8 @@ rtn:
 static int mxs_nand_hook_read_oob(struct mtd_info *mtd, loff_t from,
                                        struct mtd_oob_ops *ops)
 {
-       struct nand_chip *chip = mtd->priv;
-       struct mxs_nand_info *nand_info = chip->priv;
+       struct nand_chip *chip = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
        int ret;
 
        if (ops->mode == MTD_OPS_RAW)
@@ -793,8 +800,8 @@ static int mxs_nand_hook_read_oob(struct mtd_info *mtd, loff_t from,
 static int mxs_nand_hook_write_oob(struct mtd_info *mtd, loff_t to,
                                        struct mtd_oob_ops *ops)
 {
-       struct nand_chip *chip = mtd->priv;
-       struct mxs_nand_info *nand_info = chip->priv;
+       struct nand_chip *chip = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
        int ret;
 
        if (ops->mode == MTD_OPS_RAW)
@@ -817,8 +824,8 @@ static int mxs_nand_hook_write_oob(struct mtd_info *mtd, loff_t to,
  */
 static int mxs_nand_hook_block_markbad(struct mtd_info *mtd, loff_t ofs)
 {
-       struct nand_chip *chip = mtd->priv;
-       struct mxs_nand_info *nand_info = chip->priv;
+       struct nand_chip *chip = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(chip);
        int ret;
 
        nand_info->marking_block_bad = 1;
@@ -877,7 +884,7 @@ static int mxs_nand_hook_block_markbad(struct mtd_info *mtd, loff_t ofs)
 static int mxs_nand_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
                                int page)
 {
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
 
        /*
         * First, fill in the OOB buffer. If we're doing a raw read, we need to
@@ -912,7 +919,7 @@ static int mxs_nand_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
 static int mxs_nand_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *nand,
                                        int page)
 {
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        uint8_t block_mark = 0;
 
        /*
@@ -975,8 +982,8 @@ static int mxs_nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
  */
 static int mxs_nand_scan_bbt(struct mtd_info *mtd)
 {
-       struct nand_chip *nand = mtd->priv;
-       struct mxs_nand_info *nand_info = nand->priv;
+       struct nand_chip *nand = mtd_to_nand(mtd);
+       struct mxs_nand_info *nand_info = nand_get_controller_data(nand);
        struct mxs_bch_regs *bch_regs = (struct mxs_bch_regs *)MXS_BCH_BASE;
        uint32_t tmp;
 
@@ -1083,24 +1090,29 @@ int mxs_nand_init(struct mxs_nand_info *info)
                (struct mxs_gpmi_regs *)MXS_GPMI_BASE;
        struct mxs_bch_regs *bch_regs =
                (struct mxs_bch_regs *)MXS_BCH_BASE;
-       int i = 0, j;
+       int i = 0, j, ret = 0;
 
        info->desc = malloc(sizeof(struct mxs_dma_desc *) *
                                MXS_NAND_DMA_DESCRIPTOR_COUNT);
-       if (!info->desc)
+       if (!info->desc) {
+               ret = -ENOMEM;
                goto err1;
+       }
 
        /* Allocate the DMA descriptors. */
        for (i = 0; i < MXS_NAND_DMA_DESCRIPTOR_COUNT; i++) {
                info->desc[i] = mxs_dma_desc_alloc();
-               if (!info->desc[i])
+               if (!info->desc[i]) {
+                       ret = -ENOMEM;
                        goto err2;
+               }
        }
 
        /* Init the DMA controller. */
        for (j = MXS_DMA_CHANNEL_AHB_APBH_GPMI0;
                j <= MXS_DMA_CHANNEL_AHB_APBH_GPMI7; j++) {
-               if (mxs_dma_init_channel(j))
+               ret = mxs_dma_init_channel(j);
+               if (ret)
                        goto err3;
        }
 
@@ -1120,15 +1132,16 @@ int mxs_nand_init(struct mxs_nand_info *info)
        return 0;
 
 err3:
-       for (--j; j >= 0; j--)
+       for (--j; j >= MXS_DMA_CHANNEL_AHB_APBH_GPMI0; j--)
                mxs_dma_release(j);
 err2:
-       free(info->desc);
-err1:
        for (--i; i >= 0; i--)
                mxs_dma_desc_free(info->desc[i]);
-       printf("MXS NAND: Unable to allocate DMA descriptors\n");
-       return -ENOMEM;
+       free(info->desc);
+err1:
+       if (ret == -ENOMEM)
+               printf("MXS NAND: Unable to allocate DMA descriptors\n");
+       return ret;
 }
 
 /*!
@@ -1162,7 +1175,7 @@ int board_nand_init(struct nand_chip *nand)
 
        memset(&fake_ecc_layout, 0, sizeof(fake_ecc_layout));
 
-       nand->priv = nand_info;
+       nand_set_controller_data(nand, nand_info);
        nand->options |= NAND_NO_SUBPAGE_WRITE;
 
        nand->cmd_ctrl          = mxs_nand_cmd_ctrl;