ddr: altera: Remove unnecessary update of the SCC

[people/ms/u-boot.git] / drivers / pci / pci-uclass.c

diff --git a/drivers/pci/pci-uclass.c b/drivers/pci/pci-uclass.c
index 61292d72bda8f1c496370ab0d72489e0b880bc42..c7fbf7bf669102bd20755e60997ef8528a3c6124 100644 (file)
--- a/drivers/pci/pci-uclass.c
+++ b/drivers/pci/pci-uclass.c
@@ -30,11 +30,9 @@ int pci_get_bus(int busnum, struct udevice **busp)
 
        /* Since buses may not be numbered yet try a little harder with bus 0 */
        if (ret == -ENODEV) {
-               ret = uclass_first_device(UCLASS_PCI, busp);
+               ret = uclass_first_device_err(UCLASS_PCI, busp);
                if (ret)
                        return ret;
-               else if (!*busp)
-                       return -ENODEV;
                ret = uclass_get_device_by_seq(UCLASS_PCI, busnum, busp);
        }
 
@@ -252,6 +250,21 @@ int pci_bus_write_config(struct udevice *bus, pci_dev_t bdf, int offset,
        return ops->write_config(bus, bdf, offset, value, size);
 }
 
+int pci_bus_clrset_config32(struct udevice *bus, pci_dev_t bdf, int offset,
+                           u32 clr, u32 set)
+{
+       ulong val;
+       int ret;
+
+       ret = pci_bus_read_config(bus, bdf, offset, &val, PCI_SIZE_32);
+       if (ret)
+               return ret;
+       val &= ~clr;
+       val |= set;
+
+       return pci_bus_write_config(bus, bdf, offset, val, PCI_SIZE_32);
+}
+
 int pci_write_config(pci_dev_t bdf, int offset, unsigned long value,
                     enum pci_size_t size)
 {
@@ -276,7 +289,6 @@ int dm_pci_write_config(struct udevice *dev, int offset, unsigned long value,
                                    size);
 }
 
-
 int pci_write_config32(pci_dev_t bdf, int offset, u32 value)
 {
        return pci_write_config(bdf, offset, value, PCI_SIZE_32);
@@ -420,6 +432,48 @@ int dm_pci_read_config32(struct udevice *dev, int offset, u32 *valuep)
        return 0;
 }
 
+int dm_pci_clrset_config8(struct udevice *dev, int offset, u32 clr, u32 set)
+{
+       u8 val;
+       int ret;
+
+       ret = dm_pci_read_config8(dev, offset, &val);
+       if (ret)
+               return ret;
+       val &= ~clr;
+       val |= set;
+
+       return dm_pci_write_config8(dev, offset, val);
+}
+
+int dm_pci_clrset_config16(struct udevice *dev, int offset, u32 clr, u32 set)
+{
+       u16 val;
+       int ret;
+
+       ret = dm_pci_read_config16(dev, offset, &val);
+       if (ret)
+               return ret;
+       val &= ~clr;
+       val |= set;
+
+       return dm_pci_write_config16(dev, offset, val);
+}
+
+int dm_pci_clrset_config32(struct udevice *dev, int offset, u32 clr, u32 set)
+{
+       u32 val;
+       int ret;
+
+       ret = dm_pci_read_config32(dev, offset, &val);
+       if (ret)
+               return ret;
+       val &= ~clr;
+       val |= set;
+
+       return dm_pci_write_config32(dev, offset, val);
+}
+
 static void set_vga_bridge_bits(struct udevice *dev)
 {
        struct udevice *parent = dev->parent;
@@ -1241,3 +1295,18 @@ U_BOOT_DRIVER(pci_generic_drv) = {
        .id             = UCLASS_PCI_GENERIC,
        .of_match       = pci_generic_ids,
 };
+
+void pci_init(void)
+{
+       struct udevice *bus;
+
+       /*
+        * Enumerate all known controller devices. Enumeration has the side-
+        * effect of probing them, so PCIe devices will be enumerated too.
+        */
+       for (uclass_first_device(UCLASS_PCI, &bus);
+            bus;
+            uclass_next_device(&bus)) {
+               ;
+       }
+}