enum sh_pfc_model {
SH_PFC_R8A7795 = 0,
SH_PFC_R8A7796,
+ SH_PFC_R8A77970,
+ SH_PFC_R8A77995,
};
struct sh_pfc_pin_config {
return priv->pfc.info->functions[selector].name;
}
+int sh_pfc_config_mux_for_gpio(struct udevice *dev, unsigned pin_selector)
+{
+ struct sh_pfc_pinctrl_priv *priv = dev_get_priv(dev);
+ struct sh_pfc_pinctrl *pmx = &priv->pmx;
+ struct sh_pfc *pfc = &priv->pfc;
+ struct sh_pfc_pin_config *cfg;
+ const struct sh_pfc_pin *pin = NULL;
+ int i, idx;
+
+ for (i = 1; i < pfc->info->nr_pins; i++) {
+ if (priv->pfc.info->pins[i].pin != pin_selector)
+ continue;
+
+ pin = &priv->pfc.info->pins[i];
+ break;
+ }
+
+ if (!pin)
+ return -EINVAL;
+
+ idx = sh_pfc_get_pin_index(pfc, pin->pin);
+ cfg = &pmx->configs[idx];
+
+ if (cfg->type != PINMUX_TYPE_NONE)
+ return -EBUSY;
+
+ return sh_pfc_config_mux(pfc, pin->enum_id, PINMUX_TYPE_GPIO);
+}
+
static int sh_pfc_pinctrl_pin_set(struct udevice *dev, unsigned pin_selector,
unsigned func_selector)
{
if (model == SH_PFC_R8A7796)
priv->pfc.info = &r8a7796_pinmux_info;
#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A77970
+ if (model == SH_PFC_R8A77970)
+ priv->pfc.info = &r8a77970_pinmux_info;
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A77995
+ if (model == SH_PFC_R8A77995)
+ priv->pfc.info = &r8a77995_pinmux_info;
+#endif
priv->pmx.pfc = &priv->pfc;
sh_pfc_init_ranges(&priv->pfc);
.compatible = "renesas,pfc-r8a7796",
.data = SH_PFC_R8A7796,
},
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A77970
+ {
+ .compatible = "renesas,pfc-r8a77970",
+ .data = SH_PFC_R8A77970,
+ },
+#endif
+#ifdef CONFIG_PINCTRL_PFC_R8A77995
+ {
+ .compatible = "renesas,pfc-r8a77995",
+ .data = SH_PFC_R8A77995,
+ },
#endif
{ },
};