-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+/* Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
* Hayden Fraser (Hayden.Fraser@freescale.com)
*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _M5253DEMO_H
#define _M5253DEMO_H
-#define CONFIG_MCF52x2 /* define processor family */
-#define CONFIG_M5253 /* define processor type */
-#define CONFIG_M5253DEMO /* define board type */
-
#define CONFIG_MCFTMR
#define CONFIG_MCFUART
#define CONFIG_SYS_UART_PORT (0)
-#define CONFIG_BAUDRATE 115200
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG /* disable watchdog */
-#define CONFIG_BOOTDELAY 5
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
#ifdef CONFIG_MONITOR_IS_IN_RAM
# define CONFIG_ENV_OFFSET 0x4000
# define CONFIG_ENV_SECT_SIZE 0x1000
-# define CONFIG_ENV_IS_IN_FLASH 1
#else
# define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x4000)
# define CONFIG_ENV_SECT_SIZE 0x1000
-# define CONFIG_ENV_IS_IN_FLASH 1
#endif
+#define LDS_BOARD_TEXT \
+ . = DEFINED(env_offset) ? env_offset : .; \
+ env/embedded.o(.text*);
+
/*
* Command line configuration.
*/
-#include <config_cmd_default.h>
-
-#define CONFIG_CMD_CACHE
-#define CONFIG_CMD_LOADB
-#define CONFIG_CMD_LOADS
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
-#define CONFIG_CMD_IDE
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_MISC
-#define CONFIG_CMD_PING
-
-#ifdef CONFIG_CMD_IDE
+
+#ifdef CONFIG_IDE
/* ATA */
-# define CONFIG_DOS_PARTITION
-# define CONFIG_MAC_PARTITION
# define CONFIG_IDE_RESET 1
# define CONFIG_IDE_PREINIT 1
# define CONFIG_ATAPI
# define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
#endif
-#define CONFIG_NET_MULTI 1
#define CONFIG_DRIVER_DM9000
#ifdef CONFIG_DRIVER_DM9000
# define CONFIG_DM9000_BASE (CONFIG_SYS_CS1_BASE | 0x300)
# define DM9000_IO CONFIG_DM9000_BASE
# define DM9000_DATA (CONFIG_DM9000_BASE + 4)
# undef CONFIG_DM9000_DEBUG
+# define CONFIG_DM9000_BYTE_SWAPPED
# define CONFIG_OVERWRITE_ETHADDR_ONCE
# define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
- "inpclk=" MK_STR(CONFIG_SYS_INPUT_CLKSRC) "\0" \
+ "inpclk=" __stringify(CONFIG_SYS_INPUT_CLKSRC) "\0" \
"loadaddr=10000\0" \
"u-boot=u-boot.bin\0" \
"load=tftp ${loadaddr) ${u-boot}\0" \
#define CONFIG_HOSTNAME M5253DEMO
/* I2C */
-#define CONFIG_FSL_I2C
-#define CONFIG_HARD_I2C /* I2C with hw support */
-#define CONFIG_SYS_I2C_SPEED 80000
-#define CONFIG_SYS_I2C_SLAVE 0x7F
-#define CONFIG_SYS_I2C_OFFSET 0x00000280
+#define CONFIG_SYS_I2C
+#define CONFIG_SYS_I2C_FSL
+#define CONFIG_SYS_FSL_I2C_SPEED 80000
+#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
+#define CONFIG_SYS_FSL_I2C_OFFSET 0x00000280
#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
#define CONFIG_SYS_I2C_PINMUX_REG (*(u32 *) (CONFIG_SYS_MBAR+0x19C))
#define CONFIG_SYS_I2C_PINMUX_CLR (0xFFFFE7FF)
#define CONFIG_SYS_I2C_PINMUX_SET (0)
-#define CONFIG_SYS_PROMPT "=> "
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-
-#if defined(CONFIG_CMD_KGDB)
-# define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-# define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
#define CONFIG_SYS_LOAD_ADDR 0x00100000
#define CONFIG_SYS_MEMTEST_START 0x400
#define CONFIG_SYS_MEMTEST_END 0x380000
-#define CONFIG_SYS_HZ 1000
-
#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
#define CONFIG_SYS_FAST_CLK
#ifdef CONFIG_SYS_FAST_CLK
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
+#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
/*
#define CONFIG_SYS_CACHELINE_SIZE 16
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_END - 8)
+ CONFIG_SYS_INIT_RAM_SIZE - 8)
#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_END - 4)
+ CONFIG_SYS_INIT_RAM_SIZE - 4)
#define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM)
#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \
CF_ADDRMASK(8) | \
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