]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/M54455EVB.h
ColdFire: Cache update for all platforms
[people/ms/u-boot.git] / include / configs / M54455EVB.h
index 7737284aab692b389da6261b0e300274db5142c2..5b4bba8c26cd5c5660785e82f093f07fe8199b8c 100644 (file)
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       0x80000000
-#define CONFIG_SYS_INIT_RAM_END        0x8000  /* End of used area in internal SRAM */
+#define CONFIG_SYS_INIT_RAM_END                0x8000  /* End of used area in internal SRAM */
 #define CONFIG_SYS_INIT_RAM_CTRL       0x221
 #define CONFIG_SYS_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET     ((CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) - 32)
  */
 #define CONFIG_SYS_CACHELINE_SIZE              16
 
+#define ICACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_END - 8)
+#define DCACHE_STATUS                  (CONFIG_SYS_INIT_RAM_ADDR + \
+                                        CONFIG_SYS_INIT_RAM_END - 4)
+#define CONFIG_SYS_ICACHE_INV          (CF_CACR_BCINVA + CF_CACR_ICINVA)
+#define CONFIG_SYS_DCACHE_INV          (CF_CACR_DCINVA)
+#define CONFIG_SYS_CACHE_ACR2          (CONFIG_SYS_SDRAM_BASE | \
+                                        CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
+                                        CF_ACR_EN | CF_ACR_SM_ALL)
+#define CONFIG_SYS_CACHE_ICACR         (CF_CACR_BEC | CF_CACR_IEC | \
+                                        CF_CACR_ICINVA | CF_CACR_EUSP)
+#define CONFIG_SYS_CACHE_DCACR         ((CONFIG_SYS_CACHE_ICACR | \
+                                        CF_CACR_DEC | CF_CACR_DDCM_P | \
+                                        CF_CACR_DCINVA) & ~CF_CACR_ICINVA)
+
 /*-----------------------------------------------------------------------
  * Memory bank definitions
  */