]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/MPC837XEMDS.h
mpc83xx: Cleanup usage of BAT constants
[people/ms/u-boot.git] / include / configs / MPC837XEMDS.h
index 76e598db9cc23b00020f33295a8f05c0b2ac053e..dc4d8773b8bf9fcd54501f3932703115cdf56d91 100644 (file)
@@ -564,7 +564,7 @@ extern int board_pci_host_broken(void);
 #define CONFIG_SYS_SDRAM_UPPER         (CONFIG_SYS_SDRAM_BASE + 0x10000000)
 
 #define CONFIG_SYS_IBAT0L      (CONFIG_SYS_SDRAM_LOWER \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT0U      (CONFIG_SYS_SDRAM_LOWER \
                                | BATU_BL_256M \
@@ -574,7 +574,7 @@ extern int board_pci_host_broken(void);
 #define CONFIG_SYS_DBAT0U      CONFIG_SYS_IBAT0U
 
 #define CONFIG_SYS_IBAT1L      (CONFIG_SYS_SDRAM_UPPER \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT1U      (CONFIG_SYS_SDRAM_UPPER \
                                | BATU_BL_256M \
@@ -585,7 +585,7 @@ extern int board_pci_host_broken(void);
 
 /* IMMRBAR, PCI IO and NAND: cache-inhibit and guarded */
 #define CONFIG_SYS_IBAT2L      (CONFIG_SYS_IMMR \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_CACHEINHIBIT \
                                | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT2U      (CONFIG_SYS_IMMR \
@@ -597,7 +597,7 @@ extern int board_pci_host_broken(void);
 
 /* BCSR: cache-inhibit and guarded */
 #define CONFIG_SYS_IBAT3L      (CONFIG_SYS_BCSR \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_CACHEINHIBIT \
                                | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT3U      (CONFIG_SYS_BCSR \
@@ -609,20 +609,20 @@ extern int board_pci_host_broken(void);
 
 /* FLASH: icache cacheable, but dcache-inhibit and guarded */
 #define CONFIG_SYS_IBAT4L      (CONFIG_SYS_FLASH_BASE \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT4U      (CONFIG_SYS_FLASH_BASE \
                                | BATU_BL_32M \
                                | BATU_VS \
                                | BATU_VP)
 #define CONFIG_SYS_DBAT4L      (CONFIG_SYS_FLASH_BASE \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_CACHEINHIBIT \
                                | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_DBAT4U      CONFIG_SYS_IBAT4U
 
 /* Stack in dcache: cacheable, no memory coherence */
-#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_10)
+#define CONFIG_SYS_IBAT5L      (CONFIG_SYS_INIT_RAM_ADDR | BATL_PP_RW)
 #define CONFIG_SYS_IBAT5U      (CONFIG_SYS_INIT_RAM_ADDR \
                                | BATU_BL_128K \
                                | BATU_VS \
@@ -633,7 +633,7 @@ extern int board_pci_host_broken(void);
 #ifdef CONFIG_PCI
 /* PCI MEM space: cacheable */
 #define CONFIG_SYS_IBAT6L      (CONFIG_SYS_PCI_MEM_PHYS \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_MEMCOHERENCE)
 #define CONFIG_SYS_IBAT6U      (CONFIG_SYS_PCI_MEM_PHYS \
                                | BATU_BL_256M \
@@ -643,7 +643,7 @@ extern int board_pci_host_broken(void);
 #define CONFIG_SYS_DBAT6U      CONFIG_SYS_IBAT6U
 /* PCI MMIO space: cache-inhibit and guarded */
 #define CONFIG_SYS_IBAT7L      (CONFIG_SYS_PCI_MMIO_PHYS \
-                               | BATL_PP_10 \
+                               | BATL_PP_RW \
                                | BATL_CACHEINHIBIT \
                                | BATL_GUARDEDSTORAGE)
 #define CONFIG_SYS_IBAT7U      (CONFIG_SYS_PCI_MMIO_PHYS \