Merge git://www.denx.de/git/u-boot-marvell

[people/ms/u-boot.git] / include / configs / MPC8555CDS.h

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index b0a343d841a6a8ff5ed3b61bc3f3ffaafd29d3d8..6faa2304c939914ddbe6f634c00cca10bea94a3b 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -14,20 +14,14 @@
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE           1       /* BOOKE */
-#define CONFIG_E500            1       /* BOOKE e500 family */
 #define CONFIG_CPM2            1       /* has CPM2 */
-#define CONFIG_MPC8555         1       /* MPC8555 specific */
-#define CONFIG_MPC8555CDS      1       /* MPC8555CDS board specific */
 
 #define        CONFIG_SYS_TEXT_BASE    0xfff80000
 
-#define CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
-#define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
 #define CONFIG_FSL_VIA
 
@@ -49,7 +43,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_CCSRBAR_PHYS_LOW    CONFIG_SYS_CCSRBAR
 
 /* DDR Setup */
-#define CONFIG_SYS_FSL_DDR1
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_SPD
 #undef CONFIG_FSL_DDR_INTERACTIVE
@@ -59,7 +52,6 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_DDR_SDRAM_BASE      0x00000000      /* DDR is system memory*/
 #define CONFIG_SYS_SDRAM_BASE          CONFIG_SYS_DDR_SDRAM_BASE
 
-#define CONFIG_NUM_DDR_CONTROLLERS     1
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
@@ -297,7 +289,6 @@ extern unsigned long get_clock_freq(void);
 
 #if defined(CONFIG_PCI)
 
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_MPC85XX_PCI2
 
 #undef CONFIG_EEPRO100