drivers/mtd: Move conditional compilation to Makefile

[people/ms/u-boot.git] / include / configs / MPC8555CDS.h

diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 93877aedb048dc478f5cc871eb0983e977c4eb86..85c235c4eb06429fd4b99b1b80eb75fc4148ccab 100644 (file)
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -38,7 +38,7 @@
 #define CONFIG_MPC8555CDS      1       /* MPC8555CDS board specific */
 
 #define CONFIG_PCI
-#define CONFIG_TSEC_ENET               /* tsec ethernet support */
+#define CONFIG_TSEC_ENET               /* tsec ethernet support */
 #define CONFIG_ENV_OVERWRITE
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for DDR setup*/
 #define CONFIG_DDR_DLL                 /* possible DLL fix needed */
@@ -49,6 +49,9 @@
 
 #define CONFIG_FSL_LAW         1       /* Use common FSL init code */
 
+#define CONFIG_FSL_VIA
+#define CONFIG_FSL_CDS_EEPROM
+
 /*
  * When initializing flash, if we cannot find the manufacturer ID,
  * assume this is the AMD flash associated with the CDS board.
@@ -66,13 +69,10 @@ extern unsigned long get_clock_freq(void);
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
-#define CONFIG_L2_CACHE                            /* toggle L2 cache  */
+#define CONFIG_L2_CACHE                            /* toggle L2 cache  */
 #define CONFIG_BTB                         /* toggle branch predition */
 #define CONFIG_ADDR_STREAMING              /* toggle addr streaming   */
 
-#define CONFIG_BOARD_EARLY_INIT_F      1       /* Call board_pre_init */
-
-#undef CFG_DRAM_TEST                   /* memory test, takes time */
 #define CFG_MEMTEST_START      0x00200000      /* memtest works on */
 #define CFG_MEMTEST_END                0x00400000
 
@@ -80,8 +80,9 @@ extern unsigned long get_clock_freq(void);
  * Base addresses -- Note these are effective addresses where the
  * actual resources get mapped (not physical addresses)
  */
-#define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
+#define CFG_CCSRBAR_DEFAULT    0xff700000      /* CCSRBAR Default */
 #define CFG_CCSRBAR            0xe0000000      /* relocated CCSRBAR */
+#define CFG_CCSRBAR_PHYS       CFG_CCSRBAR     /* physical addr of CCSRBAR */
 #define CFG_IMMR               CFG_CCSRBAR     /* PQII uses CFG_IMMR */
 
 /*
@@ -151,9 +152,9 @@ extern unsigned long get_clock_freq(void);
 #define CFG_FLASH_ERASE_TOUT   60000   /* Flash Erase Timeout (ms) */
 #define CFG_FLASH_WRITE_TOUT   500     /* Flash Write Timeout (ms) */
 
-#define CFG_MONITOR_BASE       TEXT_BASE       /* start of monitor */
+#define CFG_MONITOR_BASE       TEXT_BASE       /* start of monitor */
 
-#define CFG_FLASH_CFI_DRIVER
+#define CONFIG_FLASH_CFI_DRIVER
 #define CFG_FLASH_CFI
 #define CFG_FLASH_EMPTY_INFO
 
@@ -273,21 +274,23 @@ extern unsigned long get_clock_freq(void);
  * 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
  */
 
+#define CONFIG_FSL_CADMUS
+
 #define CADMUS_BASE_ADDR 0xf8000000
 #define CFG_BR3_PRELIM   0xf8000801
 #define CFG_OR3_PRELIM   0xfff00ff7
 
 #define CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_LOCK      1
+#define CFG_INIT_RAM_LOCK      1
 #define CFG_INIT_RAM_ADDR      0xe4010000      /* Initial RAM address */
-#define CFG_INIT_RAM_END       0x4000      /* End of used area in RAM */
+#define CFG_INIT_RAM_END       0x4000      /* End of used area in RAM */
 
-#define CFG_GBL_DATA_SIZE      128         /* num bytes initial data */
+#define CFG_GBL_DATA_SIZE      128         /* num bytes initial data */
 #define CFG_GBL_DATA_OFFSET    (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
 #define CFG_INIT_SP_OFFSET     CFG_GBL_DATA_OFFSET
 
-#define CFG_MONITOR_LEN                (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN         (128 * 1024)    /* Reserved for malloc */
+#define CFG_MONITOR_LEN                (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN         (128 * 1024)    /* Reserved for malloc */
 
 /* Serial Port */
 #define CONFIG_CONS_INDEX     2
@@ -355,7 +358,7 @@ extern unsigned long get_clock_freq(void);
 #if defined(CONFIG_PCI)
 
 #define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
+#define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_MPC85XX_PCI2
 
 #undef CONFIG_EEPRO100
@@ -370,7 +373,7 @@ extern unsigned long get_clock_freq(void);
 #if defined(CONFIG_TSEC_ENET)
 
 #ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI       1
+#define CONFIG_NET_MULTI       1
 #endif
 
 #define CONFIG_MII             1       /* MII PHY management */
@@ -449,7 +452,7 @@ extern unsigned long get_clock_freq(void);
  * have to be in the first 8 MB of memory, since this is
  * the maximum mapped by the Linux kernel during initialization.
  */
-#define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
+#define CFG_BOOTMAPSZ  (8 << 20)       /* Initial Memory map for Linux*/
 
 /*
  * Internal Definitions