Merge branch 'master' of git://git.denx.de/u-boot-imx

[people/ms/u-boot.git] / include / configs / NETVIA.h

diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index f97bdcb72dd332afacb01a62e805f2fbedcf0f64..3494b7acdfe938e8b2cb2407a1b0665ffdf373b9 100644 (file)
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2010
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -37,6 +37,8 @@
 #define CONFIG_MPC850          1       /* This is a MPC850 CPU         */
 #define CONFIG_NETVIA          1       /* ...on a NetVia board         */
 
+#define        CONFIG_SYS_TEXT_BASE    0x40000000
+
 #if !defined(CONFIG_NETVIA_VERSION) || CONFIG_NETVIA_VERSION == 1
 #define        CONFIG_8xx_CONS_SMC1    1       /* Console is on SMC1           */
 #undef CONFIG_8xx_CONS_SMC2
@@ -107,7 +109,7 @@
 #define CONFIG_CMD_PING
 
 #if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
-#define CONFIG_CMD_NAND
+/* #define CONFIG_CMD_NAND */ /* disabled */
 #endif
 
 
@@ -151,9 +153,8 @@
  * Definitions for initial stack pointer and data area (in DPRAM)
  */
 #define CONFIG_SYS_INIT_RAM_ADDR       CONFIG_SYS_IMMR
-#define        CONFIG_SYS_INIT_RAM_END 0x3000  /* End of used area in DPRAM    */
-#define        CONFIG_SYS_GBL_DATA_SIZE        64  /* size in bytes reserved for initial data */
-#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
+#define        CONFIG_SYS_INIT_RAM_SIZE        0x3000  /* Size of used area in DPRAM   */
+#define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define        CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 
 /*-----------------------------------------------------------------------
@@ -191,11 +192,9 @@
 #define CONFIG_ENV_SECT_SIZE   0x10000
 
 #define        CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x60000)
-#define CONFIG_ENV_OFFSET              0
 #define        CONFIG_ENV_SIZE         0x4000
 
 #define CONFIG_ENV_ADDR_REDUND (CONFIG_SYS_FLASH_BASE + 0x70000)
-#define CONFIG_ENV_OFFSET_REDUND       0
 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
 
 /*-----------------------------------------------------------------------
@@ -346,14 +345,6 @@
                         MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |   \
                         MAMR_RLFA_1X    | MAMR_WLFA_1X    | MAMR_TLFA_4X)
 
-/*
- * Internal Definitions
- *
- * Boot Flags
- */
-#define        BOOTFLAG_COLD   0x01            /* Normal Power-On: Boot from FLASH     */
-#define BOOTFLAG_WARM  0x02            /* Software reboot                      */
-
 /* Ethernet at SCC2 */
 #define CONFIG_SCC2_ENET
 
@@ -393,80 +384,6 @@
 
 #endif
 
-/*****************************************************************************/
-
-#define CONFIG_NAND_LEGACY
-
-#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
-
-/* NAND */
-#define CONFIG_SYS_NAND_BASE                   NAND_BASE
-#define CONFIG_MTD_NAND_ECC_JFFS2
-
-#define CONFIG_SYS_MAX_NAND_DEVICE             1
-
-#define SECTORSIZE             512
-#define ADDR_COLUMN            1
-#define ADDR_PAGE              2
-#define ADDR_COLUMN_PAGE       3
-#define NAND_ChipID_UNKNOWN    0x00
-#define NAND_MAX_FLOORS                1
-
-#define NAND_DISABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |=  0x0040; \
-       } while(0)
-
-#define NAND_ENABLE_CE(nand) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \
-       } while(0)
-
-#define NAND_CTL_CLRALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \
-       } while(0)
-
-#define NAND_CTL_SETALE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |=  0x0100; \
-       } while(0)
-
-#define NAND_CTL_CLRCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \
-       } while(0)
-
-#define NAND_CTL_SETCLE(nandptr) \
-       do { \
-               (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |=  0x0080; \
-       } while(0)
-
-#define NAND_WAIT_READY(nand) \
-       do { \
-               while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \
-                       ; \
-       } while (0)
-
-#define WRITE_NAND_COMMAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND_ADDRESS(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define WRITE_NAND(d, adr) \
-       do { \
-               *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \
-       } while(0)
-
-#define READ_NAND(adr) \
-       ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr)))
-
-#endif
 
 /*****************************************************************************/