powerpc/85xx: Move RESET_VECTOR_ADDRESS into config.h

[people/ms/u-boot.git] / include / configs / P1_P2_RDB.h

diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h
index 7f05618462541c7660f26ae98650d211e07cebc5..d18d2f6fb52c33acb5dbf74f83d105bd0184dc82 100644 (file)
--- a/include/configs/P1_P2_RDB.h
+++ b/include/configs/P1_P2_RDB.h
@@ -1,5 +1,5 @@
 /*
- * Copyright 2009 Freescale Semiconductor, Inc.
+ * Copyright 2009-2011 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -46,23 +46,38 @@
 #ifdef CONFIG_NAND
 #define CONFIG_NAND_U_BOOT             1
 #define CONFIG_RAMBOOT_NAND            1
+#ifdef CONFIG_NAND_SPL
+#define CONFIG_SYS_TEXT_BASE_SPL 0xfff00000
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE_SPL /* start of monitor */
+#else
 #define CONFIG_SYS_TEXT_BASE           0xf8f82000
+#endif /* CONFIG_NAND_SPL */
 #endif
 
 #ifdef CONFIG_SDCARD
 #define CONFIG_RAMBOOT_SDCARD          1
 #define CONFIG_SYS_TEXT_BASE           0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS    0xf8fffffc
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define CONFIG_RAMBOOT_SPIFLASH                1
 #define CONFIG_SYS_TEXT_BASE           0xf8f80000
+#define CONFIG_RESET_VECTOR_ADDRESS    0xf8fffffc
 #endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE           0xeff80000
 #endif
 
+#ifndef CONFIG_RESET_VECTOR_ADDRESS
+#define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
+#endif
+
+#ifndef CONFIG_SYS_MONITOR_BASE
+#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
+#endif
+
 /* High Level Configuration Options */
 #define CONFIG_BOOKE           1       /* BOOKE */
 #define CONFIG_E500            1       /* BOOKE e500 family */
@@ -137,7 +152,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_FSL_DDR2
 #undef CONFIG_FSL_DDR_INTERACTIVE
 #undef CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
-#undef CONFIG_DDR_DLL
 
 #define CONFIG_MEM_INIT_VALUE  0xDeadBeef
 
@@ -192,11 +206,10 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */
 
-#define CONFIG_SYS_MONITOR_BASE        CONFIG_SYS_TEXT_BASE    /* start of monitor */
-
-#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \
-       || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH)
+#if defined(CONFIG_RAMBOOT_NAND) || defined(CONFIG_RAMBOOT_SDCARD) || \
+    defined(CONFIG_RAMBOOT_SPIFLASH)
 #define CONFIG_SYS_RAMBOOT
+#define CONFIG_SYS_EXTRA_ENV_RELOC
 #else
 #undef CONFIG_SYS_RAMBOOT
 #endif
@@ -213,9 +226,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_INIT_RAM_ADDR      0xffd00000       /* stack in RAM */
 #define CONFIG_SYS_INIT_RAM_SIZE       0x00004000      /* Size of used area in RAM */
 
-#define CONFIG_SYS_GBL_DATA_SIZE       128     /* num bytes initial data */
 #define CONFIG_SYS_GBL_DATA_OFFSET     (CONFIG_SYS_INIT_RAM_SIZE \
-                                               - CONFIG_SYS_GBL_DATA_SIZE)
+                                               - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_OFFSET      CONFIG_SYS_GBL_DATA_OFFSET
 
 #define CONFIG_SYS_MONITOR_LEN         (256 * 1024) /* Reserve 256 kB for Mon*/
@@ -344,6 +356,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_EEPROM_BUS_NUM      1
 
 #define CONFIG_RTC_DS1337
+#define CONFIG_SYS_RTC_DS1337_NOOSC
 #define CONFIG_SYS_I2C_RTC_ADDR                0x68
 /*
  * General PCI
@@ -351,6 +364,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  */
 
 /* controller 2, Slot 2, tgtid 2, Base address 9000 */
+#define CONFIG_SYS_PCIE2_NAME          "Slot 1"
 #define CONFIG_SYS_PCIE2_MEM_VIRT      0xa0000000
 #define CONFIG_SYS_PCIE2_MEM_BUS       0xa0000000
 #define CONFIG_SYS_PCIE2_MEM_PHYS      0xa0000000
@@ -361,6 +375,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_SYS_PCIE2_IO_SIZE       0x00010000      /* 64k */
 
 /* controller 1, Slot 1, tgtid 1, Base address a000 */
+#define CONFIG_SYS_PCIE1_NAME          "Slot 2"
 #define CONFIG_SYS_PCIE1_MEM_VIRT      0xc0000000
 #define CONFIG_SYS_PCIE1_MEM_BUS       0xc0000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS      0xc0000000
@@ -429,14 +444,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
 
 #define CONFIG_PHY_GIGE                1       /* Include GbE speed/duplex detection */
 
-/* TBI PHY configuration for SGMII mode */
-#define CONFIG_TSEC_TBICR_SETTINGS ( \
-               TBICR_PHY_RESET \
-               | TBICR_ANEG_ENABLE \
-               | TBICR_FULL_DUPLEX \
-               | TBICR_SPEED1_SET \
-               )
-
 #endif /* CONFIG_TSEC_ENET */
 
 /*
@@ -541,6 +548,7 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
  * the maximum mapped by the Linux kernel during initialization.
  */
 #define CONFIG_SYS_BOOTMAPSZ   (16 << 20)/* Initial Memory map for Linux*/
+#define CONFIG_SYS_BOOTM_LEN   (16 << 20)      /* Increase max gunzip size */
 
 #if defined(CONFIG_CMD_KGDB)
 #define CONFIG_KGDB_BAUDRATE   230400  /* speed to run kgdb serial port */