]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/T104xRDB.h
Merge branch 'master' of git://www.denx.de/git/u-boot-imx
[people/ms/u-boot.git] / include / configs / T104xRDB.h
index 0ee0ff242d32c224b9723b63b7b3ae6f35f30582..52633181ad4e990ba91eff154c338e8f4312126b 100644 (file)
  */
 #define CONFIG_T104xRDB
 #define CONFIG_PHYS_64BIT
+#define CONFIG_SYS_GENERIC_BOARD
+#define CONFIG_DISPLAY_BOARDINFO
+
+#define CONFIG_E500                    /* BOOKE e500 family */
+#include <asm/config_mpc85xx.h>
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/t104xrdb/t104x_pbi.cfg
@@ -19,6 +24,9 @@
 #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1040_rcw.cfg
 #endif
 #ifdef CONFIG_T1042RDB_PI
+#define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_pi_rcw.cfg
+#endif
+#ifdef CONFIG_T1042RDB
 #define CONFIG_SYS_FSL_PBL_RCW $(SRCTREE)/board/freescale/t104xrdb/t1042_rcw.cfg
 #endif
 
 
 /* High Level Configuration Options */
 #define CONFIG_BOOKE
-#define CONFIG_E500                    /* BOOKE e500 family */
 #define CONFIG_E500MC                  /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV           /* Category E.HV supported */
 #define CONFIG_MP                      /* support multiple processors */
 
 /* support deep sleep */
 #define CONFIG_DEEP_SLEEP
+#if defined(CONFIG_DEEP_SLEEP)
+#define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_SILENT_CONSOLE
+#endif
 
 #ifndef CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_TEXT_BASE   0xeff40000
 #define CONFIG_SYS_FSL_CPC             /* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_IFC                 /* Enable IFC Support */
+#define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCIE1                   /* PCIE controler 1 */
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_DDR_RAW_TIMING
 #define CONFIG_SYS_FSL_DDR3
 
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_RAMBOOT
 #endif
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A008044
+#if defined(CONFIG_NAND)
+#define CONFIG_A008044_WORKAROUND
+#endif
+#endif
+
 #define CONFIG_BOARD_EARLY_INIT_R
 #define CONFIG_MISC_INIT_R
 
 
 /* I2C bus multiplexer */
 #define I2C_MUX_PCA_ADDR                0x70
-#ifdef CONFIG_T1040RDB
+#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
 #define I2C_MUX_CH_DEFAULT      0x8
 #endif
 
 #define CONFIG_FSL_ESPI
 #define CONFIG_SPI_FLASH
 #define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_BAR
 #define CONFIG_CMD_SF
 #define CONFIG_SF_DEFAULT_SPEED         10000000
 #define CONFIG_SF_DEFAULT_MODE          0
 /* Qman/Bman */
 #ifndef CONFIG_NOBQFMAN
 #define CONFIG_SYS_DPAA_QBMAN          /* Support Q/Bman */
-#define CONFIG_SYS_BMAN_NUM_PORTALS    25
+#define CONFIG_SYS_BMAN_NUM_PORTALS    10
 #define CONFIG_SYS_BMAN_MEM_BASE       0xf4000000
 #define CONFIG_SYS_BMAN_MEM_PHYS       0xff4000000ull
 #define CONFIG_SYS_BMAN_MEM_SIZE       0x02000000
-#define CONFIG_SYS_QMAN_NUM_PORTALS    25
+#define CONFIG_SYS_BMAN_SP_CENA_SIZE    0x4000
+#define CONFIG_SYS_BMAN_SP_CINH_SIZE    0x1000
+#define CONFIG_SYS_BMAN_CENA_BASE       CONFIG_SYS_BMAN_MEM_BASE
+#define CONFIG_SYS_BMAN_CENA_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_CINH_BASE       (CONFIG_SYS_BMAN_MEM_BASE + \
+                                       CONFIG_SYS_BMAN_CENA_SIZE)
+#define CONFIG_SYS_BMAN_CINH_SIZE       (CONFIG_SYS_BMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_BMAN_SWP_ISDR_REG   0xE08
+#define CONFIG_SYS_QMAN_NUM_PORTALS    10
 #define CONFIG_SYS_QMAN_MEM_BASE       0xf6000000
 #define CONFIG_SYS_QMAN_MEM_PHYS       0xff6000000ull
 #define CONFIG_SYS_QMAN_MEM_SIZE       0x02000000
+#define CONFIG_SYS_QMAN_SP_CENA_SIZE    0x4000
+#define CONFIG_SYS_QMAN_SP_CINH_SIZE    0x1000
+#define CONFIG_SYS_QMAN_CENA_BASE       CONFIG_SYS_QMAN_MEM_BASE
+#define CONFIG_SYS_QMAN_CENA_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_CINH_BASE       (CONFIG_SYS_QMAN_MEM_BASE + \
+                                       CONFIG_SYS_QMAN_CENA_SIZE)
+#define CONFIG_SYS_QMAN_CINH_SIZE       (CONFIG_SYS_QMAN_MEM_SIZE >> 1)
+#define CONFIG_SYS_QMAN_SWP_ISDR_REG   0xE08
 
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 
-#ifdef CONFIG_T1040RDB
+#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
 #define CONFIG_QE
 #define CONFIG_U_QE
 #endif
 #define CONFIG_SYS_FMAN_FW_ADDR                0xEFF00000
 #endif
 
-#ifdef CONFIG_T1040RDB
+#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
 #if defined(CONFIG_SPIFLASH)
 #define CONFIG_SYS_QE_FW_ADDR          0x130000
 #elif defined(CONFIG_SDCARD)
 #endif
 
 #ifdef CONFIG_FMAN_ENET
-#ifdef CONFIG_T1040RDB
+#if defined(CONFIG_T1040RDB) || defined(CONFIG_T1042RDB)
 #define CONFIG_SYS_SGMII1_PHY_ADDR             0x03
 #endif
 #define CONFIG_SYS_RGMII1_PHY_ADDR             0x01
 #define CONFIG_SYS_RGMII2_PHY_ADDR             0x02
 
+/* Enable VSC9953 L2 Switch driver on T1040 SoC */
+#ifdef CONFIG_T1040RDB
+#define CONFIG_VSC9953
+#define CONFIG_VSC9953_CMD
+#define CONFIG_SYS_FM1_QSGMII11_PHY_ADDR       0x04
+#define CONFIG_SYS_FM1_QSGMII21_PHY_ADDR       0x08
+#endif
+
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "FM1@DTSEC4"
 #define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 #define CONFIG_CMD_NET
 #endif
 
+/* Hash command with SHA acceleration supported in hardware */
+#ifdef CONFIG_FSL_CAAM
+#define CONFIG_CMD_HASH
+#define CONFIG_SHA_HW_ACCEL
+#endif
+
 /*
  * Miscellaneous configurable options
  */
 #define CONFIG_CMDLINE_EDITING                 /* Command-line editing */
 #define CONFIG_AUTO_COMPLETE                   /* add autocompletion support */
 #define CONFIG_SYS_LOAD_ADDR   0x2000000       /* default load address */
-#define CONFIG_SYS_PROMPT      "=> "           /* Monitor Command Prompt */
 #ifdef CONFIG_CMD_KGDB
 #define CONFIG_SYS_CBSIZE      1024            /* Console I/O Buffer Size */
 #else
 #define CONFIG_BAUDRATE        115200
 
 #define __USB_PHY_TYPE utmi
+#define RAMDISKFILE    "t104xrdb/ramdisk.uboot"
 
 #ifdef CONFIG_T1040RDB
 #define FDTFILE                "t1040rdb/t1040rdb.dtb"
-#define RAMDISKFILE    "t1040rdb/ramdisk.uboot"
-#elif CONFIG_T1042RDB_PI
-#define FDTFILE                "t1040rdb_pi/t1040rdb_pi.dtb"
-#define RAMDISKFILE    "t1040rdb_pi/ramdisk.uboot"
+#elif defined(CONFIG_T1042RDB_PI)
+#define FDTFILE                "t1042rdb_pi/t1042rdb_pi.dtb"
+#elif defined(CONFIG_T1042RDB)
+#define FDTFILE                "t1042rdb/t1042rdb.dtb"
 #endif
 
 #ifdef CONFIG_FSL_DIU_FB
 
 #ifdef CONFIG_SECURE_BOOT
 #include <asm/fsl_secure_boot.h>
+#define CONFIG_CMD_BLOB
 #endif
 
 #endif /* __CONFIG_H */