Merge git://www.denx.de/git/u-boot-marvell

[people/ms/u-boot.git] / include / configs / T208xQDS.h

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 96c26233e3da4d1c0b97d8eb4b82bb5e8241fa8e..210d8d8343c838031afede4b04cc9578e935bdda 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -11,24 +11,17 @@
 #ifndef __T208xQDS_H
 #define __T208xQDS_H
 
-#define CONFIG_DISPLAY_BOARDINFO
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#define CONFIG_MMC
 #define CONFIG_USB_EHCI
-#if defined(CONFIG_PPC_T2080)
-#define CONFIG_T2080QDS
+#if defined(CONFIG_ARCH_T2080)
 #define CONFIG_FSL_SATA_V2
 #define CONFIG_SYS_SRIO                /* Enable Serial RapidIO Support */
 #define CONFIG_SRIO1           /* SRIO port 1 */
 #define CONFIG_SRIO2           /* SRIO port 2 */
-#elif defined(CONFIG_PPC_T2081)
-#define CONFIG_T2081QDS
+#elif defined(CONFIG_ARCH_T2081)
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_BOOKE
-#define CONFIG_E500            /* BOOKE e500 family */
-#define CONFIG_E500MC          /* BOOKE e500mc family */
 #define CONFIG_SYS_BOOK3E_HV   /* Category E.HV supported */
 #define CONFIG_MP              /* support multiple processors */
 #define CONFIG_ENABLE_36BIT_PHYS
@@ -39,28 +32,16 @@
 #endif
 
 #define CONFIG_SYS_FSL_CPC     /* Corenet Platform Cache */
-#define CONFIG_SYS_NUM_CPC     CONFIG_NUM_DDR_CONTROLLERS
+#define CONFIG_SYS_NUM_CPC     CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_FSL_IFC         /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                /* Enable SEC/CAAM */
-#define CONFIG_FSL_LAW         /* Use common FSL init code */
 #define CONFIG_ENV_OVERWRITE
 
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_SYS_FSL_PBL_PBI board/freescale/t208xqds/t208x_pbi.cfg
-#if defined(CONFIG_PPC_T2080)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_rcw.cfg
-#elif defined(CONFIG_PPC_T2081)
-#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_rcw.cfg
-#endif
 
-#define CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT
-#define CONFIG_SPL_SERIAL_SUPPORT
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_TARGET              "u-boot-with-spl.bin"
-#define CONFIG_SPL_LIBGENERIC_SUPPORT
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_I2C_SUPPORT
-#define CONFIG_FSL_LAW                 /* Use common FSL init code */
 #define CONFIG_SYS_TEXT_BASE           0x00201000
 #define CONFIG_SPL_TEXT_BASE           0xFFFD8000
 #define CONFIG_SPL_PAD_TO              0x40000
@@ -75,19 +56,21 @@
 #endif
 
 #ifdef CONFIG_NAND
-#define CONFIG_SPL_NAND_SUPPORT
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    (768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST     0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START   0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_OFFS    (256 << 10)
 #define CONFIG_SYS_LDSCRIPT    "arch/powerpc/cpu/mpc85xx/u-boot-nand.lds"
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_nand_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_nand_rcw.cfg
+#endif
 #define CONFIG_SPL_NAND_BOOT
 #endif
 
 #ifdef CONFIG_SPIFLASH
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
-#define CONFIG_SPL_SPI_SUPPORT
-#define CONFIG_SPL_SPI_FLASH_SUPPORT
 #define CONFIG_SPL_SPI_FLASH_MINIMAL
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_SIZE       (768 << 10)
 #define CONFIG_SYS_SPI_FLASH_U_BOOT_DST                (0x00200000)
@@ -97,12 +80,16 @@
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_spi_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_spi_rcw.cfg
+#endif
 #define CONFIG_SPL_SPI_BOOT
 #endif
 
 #ifdef CONFIG_SDCARD
 #define        CONFIG_RESET_VECTOR_ADDRESS             0x200FFC
-#define CONFIG_SPL_MMC_SUPPORT
 #define CONFIG_SPL_MMC_MINIMAL
 #define CONFIG_SYS_MMC_U_BOOT_SIZE     (768 << 10)
 #define CONFIG_SYS_MMC_U_BOOT_DST      (0x00200000)
@@ -112,6 +99,11 @@
 #ifndef CONFIG_SPL_BUILD
 #define        CONFIG_SYS_MPC85XX_NO_RESETVEC
 #endif
+#if defined(CONFIG_ARCH_T2080)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2080_sd_rcw.cfg
+#elif defined(CONFIG_ARCH_T2081)
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/t208xqds/t2081_sd_rcw.cfg
+#endif
 #define CONFIG_SPL_MMC_BOOT
 #endif
 
@@ -228,7 +220,6 @@ unsigned long get_board_ddr_clk(void);
 #define CONFIG_CHIP_SELECTS_PER_CTRL   (2 * CONFIG_DIMM_SLOTS_PER_CTLR)
 #define CONFIG_FSL_DDR_FIRST_SLOT_QUAD_CAPABLE
 #define CONFIG_DDR_SPD
-#define CONFIG_SYS_FSL_DDR3
 #define CONFIG_FSL_DDR_INTERACTIVE
 #define CONFIG_SYS_SPD_BUS_NUM 0
 #define CONFIG_SYS_SDRAM_SIZE  2048    /* for fixed parameter use */
@@ -550,7 +541,6 @@ unsigned long get_board_ddr_clk(void);
  * General PCI
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
-#define CONFIG_PCI             /* Enable PCI/PCIE */
 #define CONFIG_PCIE1           /* PCIE controller 1 */
 #define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE3           /* PCIE controller 3 */
@@ -600,7 +590,6 @@ unsigned long get_board_ddr_clk(void);
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_FSL_PCIE_RESET     /* need PCIe reset errata */
-#define CONFIG_PCI_PNP         /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   /* show pci devices on startup */
 #define CONFIG_DOS_PARTITION
 #endif