* it linked after the configuration sector.
*/
# define LDS_BOARD_TEXT \
- cpu/blackfin/traps.o (.text .text.*); \
- cpu/blackfin/interrupt.o (.text .text.*); \
- cpu/blackfin/serial.o (.text .text.*); \
+ arch/blackfin/cpu/traps.o (.text .text.*); \
+ arch/blackfin/cpu/interrupt.o (.text .text.*); \
+ arch/blackfin/cpu/serial.o (.text .text.*); \
common/dlmalloc.o (.text .text.*); \
- lib_generic/crc32.o (.text .text.*); \
+ lib/crc32.o (.text .text.*); \
. = DEFINED(env_offset) ? env_offset : .; \
common/env_embedded.o (.text .text.*);
#endif
*/
#define CONFIG_BFIN_TWI_I2C 1
#define CONFIG_HARD_I2C 1
-#define CONFIG_SYS_I2C_SPEED 50000
-#define CONFIG_SYS_I2C_SLAVE 0
/*
#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2))
#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 1))
-#define BFIN_NAND_READY PF3
#define BFIN_NAND_WRITE(addr, cmd) \
do { \
bfin_write8(addr, cmd); \
#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd)
#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd)
-#define NAND_PLAT_DEV_READY(chip) (bfin_read_PORTFIO() & BFIN_NAND_READY)
-#define NAND_PLAT_INIT() \
- do { \
- bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~BFIN_NAND_READY); \
- bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() & ~BFIN_NAND_READY); \
- bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() | BFIN_NAND_READY); \
- } while (0)
+#define NAND_PLAT_GPIO_DEV_READY GPIO_PF3
/*
#define CONFIG_RTC_BFIN
#define CONFIG_UART_CONSOLE 0
-/* #define CONFIG_BF537_STAMP_LEDCMD 1 */
-
/* Define if want to do post memory test */
#undef CONFIG_POST
#ifdef CONFIG_POST
#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */
#endif
+/* These are for board tests */
+#if 0
+#define CONFIG_BOOTCOMMAND "bootldr 0x203f0100"
+#define CONFIG_AUTOBOOT_KEYED
+#define CONFIG_AUTOBOOT_PROMPT \
+ "autoboot in %d seconds: press space to stop\n", bootdelay
+#define CONFIG_AUTOBOOT_STOP_STR " "
+#endif
+
/*
* Pull in common ADI header for remaining command/environment setup