]> git.ipfire.org Git - people/ms/u-boot.git/blobdiff - include/configs/devkit8000.h
Merge git://git.denx.de/u-boot-mmc
[people/ms/u-boot.git] / include / configs / devkit8000.h
index 182a1375dc3eeb733606f6a8a9f12785ab5f6649..dfbbb21a04c73cc0908ff2071a6a1e16dff11c32 100644 (file)
@@ -16,7 +16,6 @@
 #define __CONFIG_H
 
 /* High Level Configuration Options */
-#define CONFIG_OMAP3_DEVKIT8000        1       /* working with DevKit8000 */
 #define CONFIG_MACH_TYPE       MACH_TYPE_DEVKIT8000
 
 /*
@@ -25,7 +24,6 @@
  * header. That is 0x800FFFC0--0x80100000 should not be used for any
  * other needs.
  */
-#define CONFIG_SYS_TEXT_BASE   0x80100000
 
 #define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
 #define CONFIG_SPL_BSS_MAX_SIZE                0x80000
 #define CONFIG_SYS_SPL_MALLOC_START    0x80208000
 #define CONFIG_SYS_SPL_MALLOC_SIZE     0x100000        /* 1 MB */
 
-#include <asm/arch/cpu.h>              /* get chip and board defs */
-#include <asm/arch/omap3.h>
-
-#define CONFIG_SDRC    /* The chip has SDRC controller */
-#define CONFIG_NAND
-#define CONFIG_SYS_NAND_BASE           NAND_BASE       /* physical address */
-                                                       /* to access nand at */
-                                                       /* CS0 */
-
 /*  Physical Memory Map  */
 #define CONFIG_NR_DRAM_BANKS           2 /* CS1 may or may not be populated */
-#define PHYS_SDRAM_1                   OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2                   OMAP34XX_SDRC_CS1
-
-#include <configs/ti_armv7_common.h>
-
-/* Display CPU and Board information */
-#define CONFIG_DISPLAY_CPUINFO         1
-#define CONFIG_DISPLAY_BOARDINFO       1
 
-/* Clock Defines */
-#define V_OSCK                         26000000        /* Clock output from T2 */
-#define V_SCLK                         (V_OSCK >> 1)
+#include <configs/ti_omap3_common.h>
 
 #define CONFIG_MISC_INIT_R
 
 #define CONFIG_DM9000_NO_SROM          1
 #undef CONFIG_DM9000_DEBUG
 
-/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
-#define CONFIG_SYS_NS16550_CLK         48000000 /* 48MHz (APLL96/2) */
-
-/* select serial console configuration */
-#define CONFIG_CONS_INDEX              3
-#define CONFIG_SYS_NS16550_COM3                OMAP34XX_UART3
-#define CONFIG_SERIAL3                 3
-#define CONFIG_SYS_BAUDRATE_TABLE      {4800, 9600, 19200, 38400, 57600,\
-                                       115200}
-
 /* SPI */
 #undef CONFIG_SPI
-#undef CONFIG_OMAP3_SPI
 
 /* I2C */
-#undef CONFIG_SYS_I2C_OMAP24XX
-#define CONFIG_SYS_I2C_OMAP34XX
 
 /* TWL4030 */
-#define CONFIG_TWL4030_POWER           1
 #define CONFIG_TWL4030_LED             1
 
 /* Board NAND Info */
-#define MTDIDS_DEFAULT                 "nand0=nand"
-#define MTDPARTS_DEFAULT               "mtdparts=nand:" \
-                                               "512k(x-loader)," \
-                                               "1920k(u-boot)," \
-                                               "128k(u-boot-env)," \
-                                               "4m(kernel)," \
-                                               "-(fs)"
 
 #define CONFIG_SYS_NAND_ADDR           NAND_BASE       /* physical address */
                                                        /* to access nand */
 #define CONFIG_JFFS2_PART_SIZE         0xf980000       /* size of jffs2 */
                                                        /* partition */
 
-/* commands to include */
-#define CONFIG_CMD_DHCP                        /* DHCP support                 */
-#define CONFIG_CMD_JFFS2               /* JFFS2 Support                */
-#define CONFIG_CMD_NAND_LOCK_UNLOCK    /* nand (un)lock commands       */
-
-#undef CONFIG_CMD_FPGA                 /* FPGA configuration Support   */
-#undef CONFIG_CMD_IMI                  /* iminfo                       */
-#undef CONFIG_CMD_SPI
-#undef CONFIG_CMD_GPIO
-#undef CONFIG_CMD_ASKENV
-#undef CONFIG_CMD_BOOTZ
-#undef CONFIG_SUPPORT_RAW_INITRD
-#undef CONFIG_FAT_WRITE
-#undef CONFIG_CMD_EXT4
-#undef CONFIG_CMD_FS_GENERIC
-
 /* BOOTP/DHCP options */
-#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
 #define CONFIG_BOOTP_NISDOMAIN
-#define CONFIG_BOOTP_BOOTPATH
 #define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_DNS
 #define CONFIG_BOOTP_DNS2
 #define CONFIG_BOOTP_SEND_HOSTNAME
 #define CONFIG_BOOTP_NTPSERVER
                        "fi; " \
                "else run nandboot; fi\0"
 
-
 #define CONFIG_BOOTCOMMAND "run autoboot"
 
 /* Boot Argument Buffer Size */
 #define CONFIG_SYS_MEMTEST_END         (CONFIG_SYS_MEMTEST_START + \
                                        0x01000000) /* 16MB */
 
-/*
- * OMAP3 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
-
 /* NAND and environment organization  */
-#define CONFIG_SYS_MONITOR_LEN         (256 << 10)     /* Reserve 2 sectors */
-
-#define CONFIG_ENV_IS_IN_NAND          1
-#define SMNAND_ENV_OFFSET              0x260000 /* environment starts here */
 
-#define CONFIG_ENV_OFFSET              SMNAND_ENV_OFFSET
+#define CONFIG_ENV_OFFSET              0x260000
 
 /* SRAM config */
 #define CONFIG_SYS_SRAM_START              0x40200000
 #define CONFIG_SYS_SRAM_SIZE               0x10000
 
 /* Defines for SPL */
-#define CONFIG_SPL_NAND_SIMPLE
-
-#define CONFIG_SPL_POWER_SUPPORT
-#define CONFIG_SPL_LDSCRIPT            "$(CPUDIR)/omap-common/u-boot-spl.lds"
-#undef CONFIG_SPL_MTD_SUPPORT
 
+#undef CONFIG_SPL_TEXT_BASE
 #define CONFIG_SPL_TEXT_BASE           0x40200000 /*CONFIG_SYS_SRAM_START*/
-#define CONFIG_SPL_MAX_SIZE            (54 * 1024)     /* 8 KB for stack */
-#undef CONFIG_SPL_STACK
-#define CONFIG_SPL_STACK               LOW_LEVEL_SRAM_STACK
 
 /* NAND boot config */
-#define CONFIG_SYS_NAND_BUSWIDTH_16BIT 16
 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 #define CONFIG_SYS_NAND_PAGE_COUNT     64
 #define CONFIG_SYS_NAND_PAGE_SIZE      2048
 #define CONFIG_SYS_NAND_U_BOOT_SIZE    0x200000
 
 /* SPL OS boot options */
-#define CONFIG_CMD_SPL_WRITE_SIZE       0x400 /* 1024 byte */
-#define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
-                                       0x400000)
 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
 
 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0x8   /* address 0x1000 */
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8     /* 4KB */
 
+#undef CONFIG_SYS_SPL_ARGS_ADDR
 #define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
 
 #endif /* __CONFIG_H */