Convert CONFIG_CMD_CHIP_CONFIG to Kconfig

[people/ms/u-boot.git] / include / configs / katmai.h

diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index 10871e8349727423439eba09c7d6fa4603d81b8f..f33bfd6f44e44ad5c85941b2997dbea8c502aff1 100644 (file)
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -18,7 +18,6 @@
  * High Level Configuration Options
  *----------------------------------------------------------------------*/
 #define CONFIG_KATMAI                  1       /* Board is Katmai      */
-#define CONFIG_4xx                     1       /* ... PPC4xx family    */
 #define CONFIG_440                     1       /* ... PPC440 family    */
 #define CONFIG_440SPE                  1       /* Specifc SPe support  */
 #define CONFIG_440SPE_REVA             1       /* Support old Rev A.   */
@@ -30,7 +29,6 @@
 /*
  * Enable this board for more than 2GB of SDRAM
  */
-#define CONFIG_PHYS_64BIT
 #define        CONFIG_VERY_BIG_RAM
 
 /*
@@ -39,7 +37,6 @@
 #define CONFIG_HOSTNAME                katmai
 #include "amcc-common.h"
 
-#define CONFIG_BOARD_EARLY_INIT_F 1    /* Call board_pre_init          */
 #undef  CONFIG_SHOW_BOOT_PROGRESS
 
 /*-----------------------------------------------------------------------
@@ -103,15 +100,13 @@
 /*-----------------------------------------------------------------------
  * I2C
  *----------------------------------------------------------------------*/
-#define CONFIG_SYS_I2C_SPEED           100000  /* I2C speed and slave address  */
+#define CONFIG_SYS_I2C_PPC4XX_SPEED_0          100000
 
-#define CONFIG_I2C_MULTI_BUS
 #define CONFIG_SYS_SPD_BUS_NUM         0       /* The I2C bus for SPD          */
 
 #define IIC0_BOOTPROM_ADDR     0x50
 #define IIC0_ALT_BOOTPROM_ADDR 0x54
 
-#define CONFIG_SYS_I2C_MULTI_EEPROMS
 #define CONFIG_SYS_I2C_EEPROM_ADDR     (0x50)
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
@@ -175,14 +170,10 @@
 /*
  * Commands additional to the ones defined in amcc-common.h
  */
-#define CONFIG_CMD_CHIP_CONFIG
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_ECCTEST
-#define CONFIG_CMD_EXT2
-#define CONFIG_CMD_FAT
 #define CONFIG_CMD_PCI
 #define CONFIG_CMD_SDRAM
-#define CONFIG_CMD_SNTP
 
 #define        CONFIG_IBM_EMAC4_V4     1       /* 440SPe has this EMAC version */
 #define CONFIG_PHY_ADDR                1       /* PHY address, See schematics  */
@@ -221,9 +212,7 @@
  *-----------------------------------------------------------------------
  */
 /* General PCI */
-#define CONFIG_PCI                     /* include pci support          */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
-#define CONFIG_PCI_PNP         1       /* do pci plug-and-play         */
 #define CONFIG_PCI_SCAN_SHOW   1       /* show pci devices on startup  */
 #define CONFIG_PCI_CONFIG_HOST_BRIDGE
 
@@ -247,7 +236,6 @@
 #define CONFIG_SYSTEMACE       1       /* Enable SystemACE support     */
 #define CONFIG_SYS_SYSTEMACE_WIDTH     16      /* Data bus width is 16         */
 #define CONFIG_SYS_SYSTEMACE_BASE      CONFIG_SYS_ACE_BASE
-#define CONFIG_DOS_PARTITION   1
 
 /*-----------------------------------------------------------------------
  * External Bus Controller (EBC) Setup