Merge git://www.denx.de/git/u-boot-marvell

[people/ms/u-boot.git] / include / configs / ls1012aqds.h

diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index fcf402c836ecd3ba027d094a459fc767dd2729a8..19d65e9063cd17d98b4db9dfdbe2614a02b74652 100644 (file)
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -9,14 +9,15 @@
 
 #include "ls1012a_common.h"
 
-
+/* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
 #define CONFIG_CHIP_SELECTS_PER_CTRL   1
 #define CONFIG_NR_DRAM_BANKS           2
 #define CONFIG_SYS_SDRAM_SIZE          0x40000000
-
-#define CONFIG_SYS_MMDC_CORE_CONTROL_1         0x05180000
-#define CONFIG_SYS_MMDC_CORE_CONTROL_2         0x85180000
+#define CONFIG_CMD_MEMINFO
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_SYS_MEMTEST_START       0x80000000
+#define CONFIG_SYS_MEMTEST_END         0x9fffffff
 
 /*
  * QIXIS Definitions
@@ -28,11 +29,11 @@
 #define CONFIG_SYS_I2C_FPGA_ADDR       0x66
 #define QIXIS_LBMAP_BRDCFG_REG         0x04
 #define QIXIS_LBMAP_SWITCH             6
-#define QIXIS_LBMAP_MASK               0xf7
+#define QIXIS_LBMAP_MASK               0x08
 #define QIXIS_LBMAP_SHIFT              0
 #define QIXIS_LBMAP_DFLTBANK           0x00
 #define QIXIS_LBMAP_ALTBANK            0x08
-#define QIXIS_RST_CTL_RESET            0x41
+#define QIXIS_RST_CTL_RESET            0x31
 #define QIXIS_RCFG_CTL_RECONFIG_IDLE   0x20
 #define QIXIS_RCFG_CTL_RECONFIG_START  0x21
 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE  0x08
@@ -127,11 +128,9 @@
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT         1
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      2
-#define CONFIG_USB_STORAGE
 #endif
 
 /*  MMC  */
-#define CONFIG_MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
@@ -146,7 +145,6 @@
 #define CONFIG_SCSI_AHCI_PLAT
 #define CONFIG_CMD_SCSI
 #define CONFIG_DOS_PARTITION
-#define CONFIG_BOARD_LATE_INIT
 
 #define CONFIG_SYS_SATA                                AHCI_BASE_ADDR
 
@@ -154,28 +152,13 @@
 #define CONFIG_SYS_SCSI_MAX_LUN                        1
 #define CONFIG_SYS_SCSI_MAX_DEVICE             (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
                                                CONFIG_SYS_SCSI_MAX_LUN)
-#define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controller 1 */
-#define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
-#define FSL_PCIE_COMPAT "fsl,ls1043a-pcie"
-
-#define CONFIG_SYS_PCI_64BIT
-
-#define CONFIG_SYS_PCIE_CFG0_PHYS_OFF  0x00000000
-#define CONFIG_SYS_PCIE_CFG0_SIZE      0x00001000      /* 4k */
-#define CONFIG_SYS_PCIE_CFG1_PHYS_OFF  0x00001000
-#define CONFIG_SYS_PCIE_CFG1_SIZE      0x00001000      /* 4k */
+#define CONFIG_PARTITION_UUIDS
+#define CONFIG_EFI_PARTITION
+#define CONFIG_CMD_GPT
 
-#define CONFIG_SYS_PCIE_IO_BUS         0x00000000
-#define CONFIG_SYS_PCIE_IO_PHYS_OFF    0x00010000
-#define CONFIG_SYS_PCIE_IO_SIZE                0x00010000      /* 64k */
-
-#define CONFIG_SYS_PCIE_MEM_BUS         0x08000000
-#define CONFIG_SYS_PCIE_MEM_PHYS_OFF    0x04000000
-#define CONFIG_SYS_PCIE_MEM_SIZE        0x80000000      /* 128M */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
 
 #define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI