ARM: atmel: boards: use default CONFIG_SYS_PBSIZE

[people/ms/u-boot.git] / include / configs / ls2085aqds.h

diff --git a/include/configs/ls2085aqds.h b/include/configs/ls2085aqds.h
index 5a421641965b8cb9ac191579e5def6eaa0005f56..f7f38700323fd8f7341d47d7b0327dec531150b4 100644 (file)
--- a/include/configs/ls2085aqds.h
+++ b/include/configs/ls2085aqds.h
@@ -272,6 +272,15 @@ unsigned long get_board_ddr_clk(void);
 /* I2C bus multiplexer */
 #define I2C_MUX_CH_DEFAULT      0x8
 
+/* SPI */
+#ifdef CONFIG_FSL_DSPI
+#define CONFIG_CMD_SF
+#define CONFIG_SPI_FLASH
+#define CONFIG_SPI_FLASH_STMICRO
+#define CONFIG_SPI_FLASH_SST
+#define CONFIG_SPI_FLASH_EON
+#endif
+
 /*
  * MMC
  */
@@ -304,7 +313,6 @@ unsigned long get_board_ddr_clk(void);
 
 #ifdef CONFIG_PCI
 #define CONFIG_PCI_PNP
-#define CONFIG_E1000
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
@@ -347,10 +355,40 @@ unsigned long get_board_ddr_clk(void);
 #define SGMII_CARD_PORT3_PHY_ADDR 0x1E
 #define SGMII_CARD_PORT4_PHY_ADDR 0x1F
 
+#define XQSGMII_CARD_PHY1_PORT0_ADDR 0x0
+#define XQSGMII_CARD_PHY1_PORT1_ADDR 0x1
+#define XQSGMII_CARD_PHY1_PORT2_ADDR 0x2
+#define XQSGMII_CARD_PHY1_PORT3_ADDR 0x3
+#define XQSGMII_CARD_PHY2_PORT0_ADDR 0x4
+#define XQSGMII_CARD_PHY2_PORT1_ADDR 0x5
+#define XQSGMII_CARD_PHY2_PORT2_ADDR 0x6
+#define XQSGMII_CARD_PHY2_PORT3_ADDR 0x7
+#define XQSGMII_CARD_PHY3_PORT0_ADDR 0x8
+#define XQSGMII_CARD_PHY3_PORT1_ADDR 0x9
+#define XQSGMII_CARD_PHY3_PORT2_ADDR 0xa
+#define XQSGMII_CARD_PHY3_PORT3_ADDR 0xb
+#define XQSGMII_CARD_PHY4_PORT0_ADDR 0xc
+#define XQSGMII_CARD_PHY4_PORT1_ADDR 0xd
+#define XQSGMII_CARD_PHY4_PORT2_ADDR 0xe
+#define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf
+
 #define CONFIG_MII             /* MII PHY management */
 #define CONFIG_ETHPRIME                "DPNI1"
 #define CONFIG_PHY_GIGE                /* Include GbE speed/duplex detection */
 
 #endif
 
+/*
+ * USB
+ */
+#define CONFIG_HAS_FSL_XHCI_USB
+#define CONFIG_USB_XHCI
+#define CONFIG_USB_XHCI_FSL
+#define CONFIG_USB_XHCI_DWC3
+#define CONFIG_USB_MAX_CONTROLLER_COUNT                2
+#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS     2
+#define CONFIG_CMD_USB
+#define CONFIG_USB_STORAGE
+#define CONFIG_CMD_EXT2
+
 #endif /* __LS2_QDS_H */