Merge git://www.denx.de/git/u-boot-marvell

[people/ms/u-boot.git] / include / configs / mx6sxsabresd.h

diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h
index 2b278a8ab4ae0e3194ac0c23e76b062861817767..aff7a24587310954bad62849397b91a3adfb98f6 100644 (file)
--- a/include/configs/mx6sxsabresd.h
+++ b/include/configs/mx6sxsabresd.h
@@ -6,27 +6,45 @@
  * SPDX-License-Identifier:    GPL-2.0+
  */
 
-
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
 #include "mx6_common.h"
 
 #ifdef CONFIG_SPL
-#define CONFIG_SPL_LIBCOMMON_SUPPORT
-#define CONFIG_SPL_MMC_SUPPORT
 #include "imx6_spl.h"
 #endif
 
 /* Size of malloc() pool */
 #define CONFIG_SYS_MALLOC_LEN          (3 * SZ_1M)
 
-#define CONFIG_BOARD_EARLY_INIT_F
-
 #define CONFIG_MXC_UART
 #define CONFIG_MXC_UART_BASE           UART1_BASE
 
+#ifdef CONFIG_IMX_BOOTAUX
+/* Set to QSPI2 B flash at default */
+#define CONFIG_SYS_AUXCORE_BOOTDATA 0x78000000
+
+#define UPDATE_M4_ENV \
+       "m4image=m4_qspi.bin\0" \
+       "loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
+       "update_m4_from_sd=" \
+               "if sf probe 1:0; then " \
+                       "if run loadm4image; then " \
+                               "setexpr fw_sz ${filesize} + 0xffff; " \
+                               "setexpr fw_sz ${fw_sz} / 0x10000; "    \
+                               "setexpr fw_sz ${fw_sz} * 0x10000; "    \
+                               "sf erase 0x0 ${fw_sz}; " \
+                               "sf write ${loadaddr} 0x0 ${filesize}; " \
+                       "fi; " \
+               "fi\0" \
+       "m4boot=sf probe 1:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
+#else
+#define UPDATE_M4_ENV ""
+#endif
+
 #define CONFIG_EXTRA_ENV_SETTINGS \
+       UPDATE_M4_ENV \
        "script=boot.scr\0" \
        "image=zImage\0" \
        "console=ttymxc0\0" \
@@ -36,6 +54,7 @@
        "fdt_addr=0x88000000\0" \
        "boot_fdt=try\0" \
        "ip_dyn=yes\0" \
+       "videomode=video=ctfb:x:800,y:480,depth:24,pclk:29850,le:89,ri:164,up:23,lo:10,hs:10,vs:10,sync:0,vmode:0\0" \
        "mmcdev=2\0" \
        "mmcpart=1\0" \
        "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
@@ -109,7 +128,6 @@
 /* Physical Memory Map */
 #define CONFIG_NR_DRAM_BANKS           1
 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
-#define PHYS_SDRAM_SIZE                        SZ_1G
 
 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
@@ -124,9 +142,10 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC4_BASE_ADDR
 
 /* I2C Configs */
-#define CONFIG_CMD_I2C
 #define CONFIG_SYS_I2C
 #define CONFIG_SYS_I2C_MXC
+#define CONFIG_SYS_I2C_MXC_I2C1                /* enable I2C bus 1 */
+#define CONFIG_SYS_I2C_MXC_I2C2                /* enable I2C bus 2 */
 #define CONFIG_SYS_I2C_MXC_I2C3                /* enable I2C bus 3 */
 #define CONFIG_SYS_I2C_SPEED             100000
 
@@ -137,9 +156,6 @@
 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
 
 /* Network */
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_MII
 #define CONFIG_FEC_MXC
 #define CONFIG_MII
 
@@ -152,12 +168,9 @@
 #define CONFIG_PHYLIB
 #define CONFIG_PHY_ATHEROS
 
-
-#define CONFIG_CMD_USB
 #ifdef CONFIG_CMD_USB
 #define CONFIG_USB_EHCI
 #define CONFIG_USB_EHCI_MX6
-#define CONFIG_USB_STORAGE
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_USB_HOST_ETHER
 #define CONFIG_USB_ETHER_ASIX
@@ -168,29 +181,15 @@
 
 #define CONFIG_CMD_PCI
 #ifdef CONFIG_CMD_PCI
-#define CONFIG_PCI
-#define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_PCIE_IMX
 #define CONFIG_PCIE_IMX_PERST_GPIO     IMX_GPIO_NR(2, 0)
 #define CONFIG_PCIE_IMX_POWER_GPIO     IMX_GPIO_NR(2, 1)
 #endif
 
-#define CONFIG_IMX6_THERMAL
-
-#define CONFIG_CMD_FUSE
-#if defined(CONFIG_CMD_FUSE) || defined(CONFIG_IMX6_THERMAL)
-#define CONFIG_MXC_OCOTP
-#endif
-
-#define CONFIG_CMD_TIME
-
-#define CONFIG_FSL_QSPI
+#define CONFIG_IMX_THERMAL
 
 #ifdef CONFIG_FSL_QSPI
-#define CONFIG_CMD_SF
-#define CONFIG_SPI_FLASH_SPANSION
-#define CONFIG_SPI_FLASH_STMICRO
 #define CONFIG_SYS_FSL_QSPI_LE
 #define CONFIG_SYS_FSL_QSPI_AHB
 #ifdef CONFIG_MX6SX_SABRESD_REVA
@@ -201,6 +200,20 @@
 #define FSL_QSPI_FLASH_NUM             2
 #endif
 
+#ifndef CONFIG_SPL_BUILD
+#ifdef CONFIG_VIDEO
+#define CONFIG_VIDEO_MXS
+#define CONFIG_VIDEO_LOGO
+#define CONFIG_SPLASH_SCREEN
+#define CONFIG_SPLASH_SCREEN_ALIGN
+#define CONFIG_CMD_BMP
+#define CONFIG_BMP_16BPP
+#define CONFIG_VIDEO_BMP_RLE8
+#define CONFIG_VIDEO_BMP_LOGO
+#define MXS_LCDIF_BASE MX6SX_LCDIF1_BASE_ADDR
+#endif
+#endif
+
 #define CONFIG_ENV_OFFSET              (8 * SZ_64K)
 #define CONFIG_ENV_SIZE                        SZ_8K
 #define CONFIG_ENV_IS_IN_MMC