Add GPL-2.0+ SPDX-License-Identifier to source files

[people/ms/u-boot.git] / include / configs / pm9g45.h

diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index 672f66345a196320d1cf94a25f5a7624e05c2d4e..7d16bd8b2502e51a133d6a36d297a1125f6b30c9 100644 (file)
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -5,28 +5,12 @@
  * Ronetix GmbH <www.ronetix.at>
  *
  * (C) Copyright 2007-2008
- * Stelian Pop <stelian.pop@leadtechdesign.com>
+ * Stelian Pop <stelian@popies.net>
  * Lead Tech Design <www.leadtechdesign.com>
  *
  * Configuation settings for the PM9G45 board.
  *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __CONFIG_H
@@ -41,6 +25,9 @@
 #define CONFIG_PM9G45          1       /* It's an Ronetix PM9G45 */
 #define CONFIG_SYS_AT91_CPU_NAME       "AT91SAM9G45"
 
+#define MACH_TYPE_PM9G45       2672
+#define CONFIG_MACH_TYPE       MACH_TYPE_PM9G45
+
 /* ARM asynchronous clock */
 #define CONFIG_SYS_AT91_MAIN_CLOCK     12000000 /* from 12 MHz crystal */
 #define CONFIG_SYS_AT91_SLOW_CLOCK     32768           /* slow clock xtal */
@@ -54,6 +41,7 @@
 #define CONFIG_INITRD_TAG      1
 
 #define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_BOARD_EARLY_INIT_F
 
 /*
  * Hardware drivers
@@ -111,7 +99,6 @@
 
 /* NAND flash */
 #ifdef CONFIG_CMD_NAND
-#define CONFIG_NAND_MAX_CHIPS          1
 #define CONFIG_NAND_ATMEL
 #define CONFIG_SYS_MAX_NAND_DEVICE     1
 #define CONFIG_SYS_NAND_BASE           0x40000000
@@ -128,7 +115,6 @@
 /* Ethernet */
 #define CONFIG_MACB                    1
 #define CONFIG_RMII                    1
-#define CONFIG_NET_MULTI               1
 #define CONFIG_NET_RETRY_COUNT         20
 #define CONFIG_RESET_PHY_R             1
 
@@ -165,7 +151,6 @@
                                "rootfstype=jffs2"
 
 #define CONFIG_BAUDRATE                        115200
-#define CONFIG_SYS_BAUDRATE_TABLE      {115200 , 19200, 38400, 57600, 9600 }
 
 #define CONFIG_SYS_PROMPT              "U-Boot> "
 #define CONFIG_SYS_CBSIZE              256
@@ -176,7 +161,6 @@
 #define CONFIG_CMDLINE_EDITING         1
 #define CONFIG_AUTO_COMPLETE
 #define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
 
 /*
  * Size of malloc() pool
@@ -188,10 +172,4 @@
 #define CONFIG_SYS_INIT_SP_ADDR        (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
                                GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_STACKSIZE               (32*1024)       /* regular stack */
-
-#ifdef CONFIG_USE_IRQ
-#error CONFIG_USE_IRQ not supported
-#endif
-
 #endif