spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible

[people/ms/u-boot.git] / include / configs / socfpga_common.h

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 2c408278774722b4223a8561887d9caf0d760364..31f1338187338d01e500c60e798245151b2e6d00 100644 (file)
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -207,6 +207,7 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #define CONFIG_CQSPI_REF_CLK           cm_get_qspi_controller_clk_hz()
 #endif
 #define CONFIG_CQSPI_DECODER           0
+#define CONFIG_BOUNCE_BUFFER
 
 /*
  * Designware SPI support