tree-wide: Replace http:// link with https:// link for ti.com

[thirdparty/u-boot.git] / include / configs / ti_omap3_common.h

diff --git a/include/configs/ti_omap3_common.h b/include/configs/ti_omap3_common.h
index 3d7cb175faa6b2892da19c8c9b2490b31639e64b..45f7179f035794c567cc8dd0a4ea448f5f5e5d2c 100644 (file)
--- a/include/configs/ti_omap3_common.h
+++ b/include/configs/ti_omap3_common.h
@@ -2,12 +2,12 @@
 /*
  * ti_omap3_common.h
  *
- * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
  *
  * For more details, please see the technical documents listed at
- *   http://www.ti.com/product/omap3530
- *   http://www.ti.com/product/omap3630
- *   http://www.ti.com/product/dm3730
+ *   https://www.ti.com/product/omap3530
+ *   https://www.ti.com/product/omap3630
+ *   https://www.ti.com/product/dm3730
  */
 
 #ifndef __CONFIG_TI_OMAP3_COMMON_H__
@@ -26,19 +26,15 @@
 
 /* NS16550 Configuration */
 #define V_NS16550_CLK                  48000000        /* 48MHz (APLL96/2) */
-#define CONFIG_SYS_NS16550_CLK         V_NS16550_CLK
-#if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE    (-4)
-#endif /* !CONFIG_DM_SERIAL */
-#define CONFIG_SYS_BAUDRATE_TABLE      {4800, 9600, 19200, 38400, 57600, \
+#define CFG_SYS_NS16550_CLK            V_NS16550_CLK
+#define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
                                        115200}
 
 /* Select serial console configuration */
 #ifdef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NS16550_COM1                OMAP34XX_UART1
-#define CONFIG_SYS_NS16550_COM2                OMAP34XX_UART2
-#define CONFIG_SYS_NS16550_COM3                OMAP34XX_UART3
+#define CFG_SYS_NS16550_COM1           OMAP34XX_UART1
+#define CFG_SYS_NS16550_COM2           OMAP34XX_UART2
+#define CFG_SYS_NS16550_COM3           OMAP34XX_UART3
 #endif
 
 /* Physical Memory Map */
@@ -50,16 +46,12 @@
  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  * This rate is divided by a local divisor.
  */
-#define CONFIG_SYS_TIMERBASE           (OMAP34XX_GPT2)
-
-#define CONFIG_SYS_MONITOR_LEN         (256 << 10)
+#define CFG_SYS_TIMERBASE              (OMAP34XX_GPT2)
 
 /* SPL */
-#define CONFIG_SYS_SPL_ARGS_ADDR       (CONFIG_SYS_SDRAM_BASE + \
-                                        (64 << 20))
 
 #ifdef CONFIG_MTD_RAW_NAND
-#define CONFIG_SYS_NAND_BASE           0x30000000
+#define CFG_SYS_NAND_BASE              0x30000000
 #endif
 
 /* Now bring in the rest of the common code. */