engicam: Set fdt_file env during run-time

[people/ms/u-boot.git] / include / fdtdec.h

diff --git a/include/fdtdec.h b/include/fdtdec.h
index aeb6bab1c4c6f2b53f8acd56dccfa72f83a31c85..3000ecbb587b96359d87df98e97ed8704f3c3705 100644 (file)
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -148,7 +148,6 @@ enum fdt_compat_id {
        COMPAT_INTEL_MICROCODE,         /* Intel microcode update */
        COMPAT_AMS_AS3722,              /* AMS AS3722 PMIC */
        COMPAT_INTEL_QRK_MRC,           /* Intel Quark MRC */
-       COMPAT_SOCIONEXT_XHCI,          /* Socionext UniPhier xHCI */
        COMPAT_ALTERA_SOCFPGA_DWMAC,    /* SoCFPGA Ethernet controller */
        COMPAT_ALTERA_SOCFPGA_DWMMC,    /* SoCFPGA DWMMC controller */
        COMPAT_ALTERA_SOCFPGA_DWC2USB,  /* SoCFPGA DWC2 USB controller */
@@ -156,6 +155,14 @@ enum fdt_compat_id {
        COMPAT_INTEL_BAYTRAIL_FSP_MDP,  /* Intel FSP memory-down params */
        COMPAT_INTEL_IVYBRIDGE_FSP,     /* Intel Ivy Bridge FSP */
        COMPAT_SUNXI_NAND,              /* SUNXI NAND controller */
+       COMPAT_ALTERA_SOCFPGA_CLK,      /* SoCFPGA Clock initialization */
+       COMPAT_ALTERA_SOCFPGA_PINCTRL_SINGLE,   /* SoCFPGA pinctrl-single */
+       COMPAT_ALTERA_SOCFPGA_H2F_BRG,          /* SoCFPGA hps2fpga bridge */
+       COMPAT_ALTERA_SOCFPGA_LWH2F_BRG,        /* SoCFPGA lwhps2fpga bridge */
+       COMPAT_ALTERA_SOCFPGA_F2H_BRG,          /* SoCFPGA fpga2hps bridge */
+       COMPAT_ALTERA_SOCFPGA_F2SDR0,           /* SoCFPGA fpga2SDRAM0 bridge */
+       COMPAT_ALTERA_SOCFPGA_F2SDR1,           /* SoCFPGA fpga2SDRAM1 bridge */
+       COMPAT_ALTERA_SOCFPGA_F2SDR2,           /* SoCFPGA fpga2SDRAM2 bridge */
 
        COMPAT_COUNT,
 };
@@ -960,6 +967,7 @@ struct display_timing {
        struct timing_entry vsync_len;          /* ver. sync len */
 
        enum display_flags flags;               /* display flags */
+       bool hdmi_monitor;                      /* is hdmi monitor? */
 };
 
 /**
@@ -977,9 +985,49 @@ struct display_timing {
  */
 int fdtdec_decode_display_timing(const void *blob, int node, int index,
                                 struct display_timing *config);
+
+/**
+ * fdtdec_setup_memory_size() - decode and setup gd->ram_size
+ *
+ * Decode the /memory 'reg' property to determine the size of the first memory
+ * bank, populate the global data with the size of the first bank of memory.
+ *
+ * This function should be called from a boards dram_init(). This helper
+ * function allows for boards to query the device tree for DRAM size instead of
+ * hard coding the value in the case where the memory size cannot be detected
+ * automatically.
+ *
+ * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
+ * invalid
+ */
+int fdtdec_setup_memory_size(void);
+
+/**
+ * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram
+ *
+ * Decode the /memory 'reg' property to determine the address and size of the
+ * memory banks. Use this data to populate the global data board info with the
+ * phys address and size of memory banks.
+ *
+ * This function should be called from a boards dram_init_banksize(). This
+ * helper function allows for boards to query the device tree for memory bank
+ * information instead of hard coding the information in cases where it cannot
+ * be detected automatically.
+ *
+ * @return 0 if OK, -EINVAL if the /memory node or reg property is missing or
+ * invalid
+ */
+int fdtdec_setup_memory_banksize(void);
+
 /**
  * Set up the device tree ready for use
  */
 int fdtdec_setup(void);
 
+/**
+ * Board-specific FDT initialization. Returns the address to a device tree blob.
+ * Called when CONFIG_OF_BOARD is defined.
+ */
+void *board_fdt_blob_setup(void);
+
 #endif