net: tsec: fsl_mdio: Fix several cosmetic issues

[people/ms/u-boot.git] / include / fsl_sec.h

diff --git a/include/fsl_sec.h b/include/fsl_sec.h
index dbfae68ef42c8a5a4bb29773b822b5db4610bf9c..2ddced34ab742de4c47b54217b99f56a3f486ab3 100644 (file)
--- a/include/fsl_sec.h
+++ b/include/fsl_sec.h
@@ -3,6 +3,7 @@
  *
  * Copyright 2014 Freescale Semiconductor, Inc.
  *
+ * SPDX-License-Identifier:    GPL-2.0+
  */
 
 #ifndef __FSL_SEC_H
@@ -32,10 +33,20 @@
 /* RNG4 TRNG test registers */
 struct rng4tst {
 #define RTMCTL_PRGM 0x00010000 /* 1 -> program mode, 0 -> run mode */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_SC     0 /* use von Neumann data in
+                                                   both entropy shifter and
+                                                   statistical checker */
+#define RTMCTL_SAMP_MODE_RAW_ES_SC             1 /* use raw data in both
+                                                   entropy shifter and
+                                                   statistical checker */
+#define RTMCTL_SAMP_MODE_VON_NEUMANN_ES_RAW_SC 2 /* use von Neumann data in
+                                                   entropy shifter, raw data
+                                                   in statistical checker */
+#define RTMCTL_SAMP_MODE_INVALID               3 /* invalid combination */
        u32 rtmctl;             /* misc. control register */
        u32 rtscmisc;           /* statistical check misc. register */
        u32 rtpkrrng;           /* poker range register */
-#define RTSDCTL_ENT_DLY_MIN    1200
+#define RTSDCTL_ENT_DLY_MIN    3200
 #define RTSDCTL_ENT_DLY_MAX    12800
        union {
                u32 rtpkrmax;   /* PRGM=1: poker max. limit register */
@@ -49,6 +60,7 @@ struct rng4tst {
                u32 rttotsam;   /* PRGM=0: total samples register */
        };
        u32 rtfreqmin;          /* frequency count min. limit register */
+#define RTFRQMAX_DISABLE       (1 << 20)
        union {
                u32 rtfreqmax;  /* PRGM=1: freq. count max. limit register */
                u32 rtfreqcnt;  /* PRGM=0: freq. count register */
@@ -180,13 +192,11 @@ struct jr_regs {
  * related information
  */
 struct sg_entry {
-#ifdef defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
+#if defined(CONFIG_SYS_FSL_SEC_LE) && !defined(CONFIG_MX6)
        uint32_t addr_lo;       /* Memory Address - lo */
-       uint16_t addr_hi;       /* Memory Address of start of buffer - hi */
-       uint16_t reserved_zero;
+       uint32_t addr_hi;       /* Memory Address of start of buffer - hi */
 #else
-       uint16_t reserved_zero;
-       uint16_t addr_hi;       /* Memory Address of start of buffer - hi */
+       uint32_t addr_hi;       /* Memory Address of start of buffer - hi */
        uint32_t addr_lo;       /* Memory Address - lo */
 #endif