/*
* U-boot - string.c Contains library routines.
*
- * Copyright (c) 2005-2007 Analog Devices Inc.
+ * Copyright (c) 2005-2008 Analog Devices Inc.
*
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# define bfin_write_MDMA_D0_IRQ_STATUS bfin_write_MDMA1_D0_IRQ_STATUS
# define bfin_read_MDMA_D0_IRQ_STATUS bfin_read_MDMA1_D0_IRQ_STATUS
#endif
-static void *dma_memcpy(void *dst, const void *src, size_t count)
+/* This version misbehaves for count values of 0 and 2^16+.
+ * Perhaps we should detect that ? Nowhere do we actually
+ * use dma memcpy for those types of lengths though ...
+ */
+void dma_memcpy_nocache(void *dst, const void *src, size_t count)
{
- if (dcache_status())
- blackfin_dcache_flush_range(src, src + count);
+ uint16_t wdsize, mod;
+
+ /* Disable DMA in case it's still running (older u-boot's did not
+ * always turn them off). Do it before the if statement below so
+ * we can be cheap and not do a SSYNC() due to the forced abort.
+ */
+ bfin_write_MDMA_D0_CONFIG(0);
+ bfin_write_MDMA_S0_CONFIG(0);
+ bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+
+ /* Scratchpad cannot be a DMA source or destination */
+ if (((unsigned long)src >= L1_SRAM_SCRATCH &&
+ (unsigned long)src < L1_SRAM_SCRATCH_END) ||
+ ((unsigned long)dst >= L1_SRAM_SCRATCH &&
+ (unsigned long)dst < L1_SRAM_SCRATCH_END))
+ hang();
- bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR);
+ if (((unsigned long)dst | (unsigned long)src | count) & 0x1) {
+ wdsize = WDSIZE_8;
+ mod = 1;
+ } else if (((unsigned long)dst | (unsigned long)src | count) & 0x2) {
+ wdsize = WDSIZE_16;
+ count >>= 1;
+ mod = 2;
+ } else {
+ wdsize = WDSIZE_32;
+ count >>= 2;
+ mod = 4;
+ }
/* Copy sram functions from sdram to sram */
/* Setup destination start address */
/* Setup destination xcount */
bfin_write_MDMA_D0_X_COUNT(count);
/* Setup destination xmodify */
- bfin_write_MDMA_D0_X_MODIFY(1);
+ bfin_write_MDMA_D0_X_MODIFY(mod);
/* Setup Source start address */
bfin_write_MDMA_S0_START_ADDR(src);
/* Setup Source xcount */
bfin_write_MDMA_S0_X_COUNT(count);
/* Setup Source xmodify */
- bfin_write_MDMA_S0_X_MODIFY(1);
+ bfin_write_MDMA_S0_X_MODIFY(mod);
/* Enable source DMA */
- bfin_write_MDMA_S0_CONFIG(DMAEN);
+ bfin_write_MDMA_S0_CONFIG(wdsize | DMAEN);
+ bfin_write_MDMA_D0_CONFIG(wdsize | DMAEN | WNR | DI_EN);
SSYNC();
- bfin_write_MDMA_D0_CONFIG(WNR | DMAEN);
+ while (!(bfin_read_MDMA_D0_IRQ_STATUS() & DMA_DONE))
+ continue;
- while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN)
- bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR);
- bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR);
+ bfin_write_MDMA_D0_IRQ_STATUS(DMA_RUN | DMA_DONE | DMA_ERR);
+ bfin_write_MDMA_D0_CONFIG(0);
+ bfin_write_MDMA_S0_CONFIG(0);
+}
+/* We should do a dcache invalidate on the destination after the dma, but since
+ * we lack such hardware capability, we'll flush/invalidate the destination
+ * before the dma and bank on the idea that u-boot is single threaded.
+ */
+void *dma_memcpy(void *dst, const void *src, size_t count)
+{
+ if (dcache_status()) {
+ blackfin_dcache_flush_range(src, src + count);
+ blackfin_dcache_flush_invalidate_range(dst, dst + count);
+ }
+
+ dma_memcpy_nocache(dst, src, count);
if (icache_status())
blackfin_icache_flush_range(dst, dst + count);
- if (dcache_status())
- blackfin_dcache_invalidate_range(dst, dst + count);
-
return dst;
}
if (!count)
return dst;
- if (addr_bfin_on_chip_mem(dst)) {
- /* L1 is the destination */
- return dma_memcpy(dst, src, count);
+#ifdef CONFIG_CMD_KGDB
+ if (src >= (void *)SYSMMR_BASE) {
+ if (count == 2 && (unsigned long)src % 2 == 0) {
+ u16 mmr = bfin_read16(src);
+ memcpy(dst, &mmr, sizeof(mmr));
+ return dst;
+ }
+ if (count == 4 && (unsigned long)src % 4 == 0) {
+ u32 mmr = bfin_read32(src);
+ memcpy(dst, &mmr, sizeof(mmr));
+ return dst;
+ }
+ /* Failed for some reason */
+ memset(dst, 0xad, count);
+ return dst;
+ }
+ if (dst >= (void *)SYSMMR_BASE) {
+ if (count == 2 && (unsigned long)dst % 2 == 0) {
+ u16 mmr;
+ memcpy(&mmr, src, sizeof(mmr));
+ bfin_write16(dst, mmr);
+ return dst;
+ }
+ if (count == 4 && (unsigned long)dst % 4 == 0) {
+ u32 mmr;
+ memcpy(&mmr, src, sizeof(mmr));
+ bfin_write32(dst, mmr);
+ return dst;
+ }
+ /* Failed for some reason */
+ memset(dst, 0xad, count);
+ return dst;
+ }
+#endif
- } else if (addr_bfin_on_chip_mem(src)) {
- /* L1 is the source */
+ /* if L1 is the source or dst, use DMA */
+ if (addr_bfin_on_chip_mem(dst) || addr_bfin_on_chip_mem(src))
return dma_memcpy(dst, src, count);
-
- } else
+ else
/* No L1 is involved, so just call regular memcpy */
return memcpy_ASM(dst, src, count);
}
projects / people / ms / u-boot.git / blobdiff