ppc4xx: Big cleanup of PPC4xx defines

[people/ms/u-boot.git] / post / cpu / ppc4xx / uart.c

diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c
index 84a4d0a0d6381a2a6c8e68f22f36e442cb1c1f13..be217fcf8db85d97bfd1cbd5ef0aeed90040c8da 100644 (file)
--- a/post/cpu/ppc4xx/uart.c
+++ b/post/cpu/ppc4xx/uart.c
@@ -68,7 +68,7 @@
 #define CR0_EXTCLK_ENA  0x00600000
 #define CR0_UDIV_POS    16
 #define UDIV_SUBTRACT  1
-#define UART0_SDR      cntrl0
+#define UART0_SDR      CPC0_CR0
 #define MFREG(a, d)    d = mfdcr(a)
 #define MTREG(a, d)    mtdcr(a, d)
 #else /* #if defined(CONFIG_440GP) */
@@ -77,16 +77,16 @@
 #define CR0_EXTCLK_ENA  0x00800000
 #define CR0_UDIV_POS    0
 #define UDIV_SUBTRACT  0
-#define UART0_SDR      sdr_uart0
-#define UART1_SDR      sdr_uart1
+#define UART0_SDR      SDR0_UART0
+#define UART1_SDR      SDR0_UART1
 #if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
     defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \
     defined(CONFIG_440SP) || defined(CONFIG_440SPE)
-#define UART2_SDR      sdr_uart2
+#define UART2_SDR      SDR0_UART2
 #endif
 #if defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \
     defined(CONFIG_440GR) || defined(CONFIG_440GRX)
-#define UART3_SDR      sdr_uart3
+#define UART3_SDR      SDR0_UART3
 #endif
 #define MFREG(a, d)    mfsdr(a, d)
 #define MTREG(a, d)    mtsdr(a, d)
@@ -106,8 +106,8 @@
 #define CR0_EXTCLK_ENA 0x00800000
 #define CR0_UDIV_POS   0
 #define UDIV_SUBTRACT  0
-#define UART0_SDR      sdr_uart0
-#define UART1_SDR      sdr_uart1
+#define UART0_SDR      SDR0_UART0
+#define UART1_SDR      SDR0_UART1
 #define MFREG(a, d)    mfsdr(a, d)
 #define MTREG(a, d)    mtsdr(a, d)
 #else /* CONFIG_405GP || CONFIG_405CR */
@@ -276,7 +276,7 @@ static int uart_post_init (unsigned long dev_base)
        clk = tmp = reg = 0;
 #else
 #ifdef CONFIG_405EP
-       reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK);
+       reg = mfdcr(CPC0_UCR) & ~(UCR0_MASK | UCR1_MASK);
        clk = gd->cpu_clk;
        tmp = CONFIG_SYS_BASE_BAUD * 16;
        udiv = (clk + tmp / 2) / tmp;
@@ -284,9 +284,9 @@ static int uart_post_init (unsigned long dev_base)
                udiv = UDIV_MAX;
        reg |= (udiv) << UCR0_UDIV_POS;         /* set the UART divisor */
        reg |= (udiv) << UCR1_UDIV_POS;         /* set the UART divisor */
-       mtdcr (cpc0_ucr, reg);
+       mtdcr (CPC0_UCR, reg);
 #else /* CONFIG_405EP */
-       reg = mfdcr(cntrl0) & ~CR0_MASK;
+       reg = mfdcr(CPC0_CR0) & ~CR0_MASK;
 #ifdef CONFIG_SYS_EXT_SERIAL_CLOCK
        clk = CONFIG_SYS_EXT_SERIAL_CLOCK;
        udiv = 1;
@@ -303,7 +303,7 @@ static int uart_post_init (unsigned long dev_base)
 #endif
 #endif
        reg |= (udiv - 1) << CR0_UDIV_POS;      /* set the UART divisor */
-       mtdcr (cntrl0, reg);
+       mtdcr (CPC0_CR0, reg);
 #endif /* CONFIG_405EP */
        tmp = gd->baudrate * udiv * 16;
        bdiv = (clk + tmp / 2) / tmp;