* different sets of operand registers and result registers.
*/
-#ifdef CONFIG_POST
-
#include <post.h>
#include "cpu_asm.h"
-#if CONFIG_POST & CFG_POST_CPU
+#if CONFIG_POST & CONFIG_SYS_POST_CPU
extern void cpu_post_exec_22 (ulong *code, ulong *cr, ulong *res, ulong op1,
ulong op2);
} cpu_post_rlwimi_table[] =
{
{
- OP_RLWIMI,
+ OP_RLWIMI,
0xff00ffff,
0x0000aa00,
8,
unsigned int reg0 = (reg + 0) % 32;
unsigned int reg1 = (reg + 1) % 32;
unsigned int stk = reg < 16 ? 31 : 15;
- unsigned long code[] =
+ unsigned long code[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
ASM_LWZ(stk, 1, -4),
ASM_BLR,
};
- unsigned long codecr[] =
+ unsigned long codecr[] =
{
ASM_STW(stk, 1, -4),
ASM_ADDI(stk, 1, -20),
if (ret == 0)
{
- cr = 0;
- cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
+ cr = 0;
+ cpu_post_exec_22 (code, & cr, & res, test->op0, test->op1);
- ret = res == test->res && cr == 0 ? 0 : -1;
+ ret = res == test->res && cr == 0 ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwimi test %d !\n", i);
- }
+ }
}
if (ret == 0)
{
- cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
+ cpu_post_exec_22 (codecr, & cr, & res, test->op0, test->op1);
- ret = res == test->res &&
+ ret = res == test->res &&
(cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1;
- if (ret != 0)
- {
+ if (ret != 0)
+ {
post_log ("Error at rlwimi test %d !\n", i);
}
}
}
if (flag)
- enable_interrupts();
+ enable_interrupts();
return ret;
}
#endif
-#endif