Squashed 'dts/upstream/' changes from aaba2d45dc2a..b35b9bd1d4ee

[thirdparty/u-boot.git] / src / arm64 / marvell / armada-8040-clearfog-gt-8k.dts

diff --git a/src/arm64/marvell/armada-8040-clearfog-gt-8k.dts b/src/arm64/marvell/armada-8040-clearfog-gt-8k.dts
index 4125202028c8569e67707433220c7ba3f9152119..67892f0d28633eb3eca9f40016609103f29c9aeb 100644 (file)
--- a/src/arm64/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/src/arm64/marvell/armada-8040-clearfog-gt-8k.dts
@@ -497,42 +497,42 @@
                reset-deassert-us = <10000>;
        };
 
-       switch0: switch0@4 {
+       switch0: ethernet-switch@4 {
                compatible = "marvell,mv88e6085";
                reg = <4>;
                pinctrl-names = "default";
                pinctrl-0 = <&cp1_switch_reset_pins>;
                reset-gpios = <&cp1_gpio1 24 GPIO_ACTIVE_LOW>;
 
-               ports {
+               ethernet-ports {
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       port@1 {
+                       ethernet-port@1 {
                                reg = <1>;
                                label = "lan2";
                                phy-handle = <&switch0phy0>;
                        };
 
-                       port@2 {
+                       ethernet-port@2 {
                                reg = <2>;
                                label = "lan1";
                                phy-handle = <&switch0phy1>;
                        };
 
-                       port@3 {
+                       ethernet-port@3 {
                                reg = <3>;
                                label = "lan4";
                                phy-handle = <&switch0phy2>;
                        };
 
-                       port@4 {
+                       ethernet-port@4 {
                                reg = <4>;
                                label = "lan3";
                                phy-handle = <&switch0phy3>;
                        };
 
-                       port@5 {
+                       ethernet-port@5 {
                                reg = <5>;
                                label = "cpu";
                                ethernet = <&cp1_eth2>;
@@ -545,19 +545,19 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
 
-                       switch0phy0: switch0phy0@11 {
+                       switch0phy0: ethernet-phy@11 {
                                reg = <0x11>;
                        };
 
-                       switch0phy1: switch0phy1@12 {
+                       switch0phy1: ethernet-phy@12 {
                                reg = <0x12>;
                        };
 
-                       switch0phy2: switch0phy2@13 {
+                       switch0phy2: ethernet-phy@13 {
                                reg = <0x13>;
                        };
 
-                       switch0phy3: switch0phy3@14 {
+                       switch0phy3: ethernet-phy@14 {
                                reg = <0x14>;
                        };
                };