X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=arch%2Fx86%2FKconfig;h=a5f24d00a69a5853be70e34be2f2df369509de40;hb=8ef07571a0300e6ae84931c63d5eb3b2310c8aba;hp=0dba8acbb2b320671541c939c739b98402f100b9;hpb=0ce4af99c07acebf4fce9a91f1099d2460629293;p=people%2Fms%2Fu-boot.git

diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 0dba8acbb2..a5f24d00a6 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -12,9 +12,32 @@ choice
 
 config TARGET_COREBOOT
 	bool "Support coreboot"
+	help
+	  This target is used for running U-Boot on top of Coreboot. In
+	  this case Coreboot does the early inititalisation, and U-Boot
+	  takes over once the RAM, video and CPU are fully running.
+	  U-Boot is loaded as a fallback payload from Coreboot, in
+	  Coreboot terminology. This method was used for the Chromebook
+	  Pixel when launched.
+
+config TARGET_CHROMEBOOK_LINK
+	bool "Support Chromebook link"
+	help
+	  This is the Chromebook Pixel released in 2013. It uses an Intel
+	  i5 Ivybridge which is a die-shrink of Sandybridge, with 4GB of
+	  SDRAM. It has a Panther Point platform controller hub, PCIe
+	  WiFi and Bluetooth. It also includes a 720p webcam, USB SD
+	  reader, microphone and speakers, display port and 32GB SATA
+	  solid state drive. There is a Chrome OS EC connected on LPC,
+	  and it provides a 2560x1700 high resolution touch-enabled LCD
+	  display.
 
 endchoice
 
+source "arch/x86/cpu/ivybridge/Kconfig"
+
 source "board/chromebook-x86/coreboot/Kconfig"
 
+source "board/google/chromebook_link/Kconfig"
+
 endmenu