X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=board%2Fcsb272%2Fcsb272.c;h=cb24cd4ffebddc4b8d565b35d8763c518bd05528;hb=d1c3b27525b664e8c4db6bb173eed51bfc8220de;hp=fecd7e8ef387620dd09db9c5b570d44e74bf11a4;hpb=42dfe7a1844cbad7114038aaf03828acb7a84414;p=people%2Fms%2Fu-boot.git diff --git a/board/csb272/csb272.c b/board/csb272/csb272.c index fecd7e8ef3..cb24cd4ffe 100644 --- a/board/csb272/csb272.c +++ b/board/csb272/csb272.c @@ -25,7 +25,9 @@ #include #include #include -#include <405gp_enet.h> +#include + +void sdram_init(void); /* * Configuration data for AMIS FS6377-01 Programmable 3-PLL Clock Generator @@ -49,9 +51,9 @@ uchar pll_fs6377_regs[16] = { */ int pll_init(void) { - i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); - return i2c_write(CFG_I2C_PLL_ADDR, 0, 1, + return i2c_write(CONFIG_SYS_I2C_PLL_ADDR, 0, 1, (uchar *) pll_fs6377_regs, sizeof(pll_fs6377_regs)); } @@ -93,7 +95,7 @@ int board_early_init_f(void) mtdcr (uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */ - mtebc (epcr, 0xa8400000); /* EBC always driven */ + mtebc (EBC0_CFG, 0xa8400000); /* EBC always driven */ return 0; /* success */ } @@ -118,37 +120,44 @@ int checkboard(void) * configured by initialization code * */ -long initdram (int board_type) +phys_size_t initdram (int board_type) { ulong tot_size; ulong bank_size; ulong tmp; + /* + * ToDo: Move the asm init routine sdram_init() to this C file, + * or even better use some common ppc4xx code available + * in cpu/ppc4xx + */ + sdram_init(); + tot_size = 0; - mtdcr (memcfga, mem_mb0cf); - tmp = mfdcr (memcfgd); + mtdcr (SDRAM0_CFGADDR, mem_mb0cf); + tmp = mfdcr (SDRAM0_CFGDATA); if (tmp & 0x00000001) { bank_size = 0x00400000 << ((tmp >> 17) & 0x7); tot_size += bank_size; } - mtdcr (memcfga, mem_mb1cf); - tmp = mfdcr (memcfgd); + mtdcr (SDRAM0_CFGADDR, mem_mb1cf); + tmp = mfdcr (SDRAM0_CFGDATA); if (tmp & 0x00000001) { bank_size = 0x00400000 << ((tmp >> 17) & 0x7); tot_size += bank_size; } - mtdcr (memcfga, mem_mb2cf); - tmp = mfdcr (memcfgd); + mtdcr (SDRAM0_CFGADDR, mem_mb2cf); + tmp = mfdcr (SDRAM0_CFGDATA); if (tmp & 0x00000001) { bank_size = 0x00400000 << ((tmp >> 17) & 0x7); tot_size += bank_size; } - mtdcr (memcfga, mem_mb3cf); - tmp = mfdcr (memcfgd); + mtdcr (SDRAM0_CFGADDR, mem_mb3cf); + tmp = mfdcr (SDRAM0_CFGDATA); if (tmp & 0x00000001) { bank_size = 0x00400000 << ((tmp >> 17) & 0x7); tot_size += bank_size; @@ -164,10 +173,15 @@ long initdram (int board_type) int last_stage_init(void) { /* initialize the PHY */ - miiphy_reset(CONFIG_PHY_ADDR); - miiphy_write(CONFIG_PHY_ADDR, PHY_BMCR, - PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); /* AUTO neg */ - miiphy_write(CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); /* LEDs */ + miiphy_reset("ppc_4xx_eth0", CONFIG_PHY_ADDR); + + /* AUTO neg */ + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_BMCR, + PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); + + /* LEDs */ + miiphy_write("ppc_4xx_eth0", CONFIG_PHY_ADDR, PHY_FCSCR, 0x0d08); + return 0; /* success */ }