X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=common%2Fboard_f.c;h=55ede07537cc8b15a3851c3ff58610c3c2e723db;hb=a538ae997ae4cb375ba5362b50ba3f5b35f9519b;hp=4ece2b6c9fe34385b5d3dd9b4452f610cf16e708;hpb=2c19478e01ab145c8b3a1f5b1beca9958d942e98;p=people%2Fms%2Fu-boot.git diff --git a/common/board_f.c b/common/board_f.c index 4ece2b6c9f..55ede07537 100644 --- a/common/board_f.c +++ b/common/board_f.c @@ -34,7 +34,7 @@ #ifdef CONFIG_MPC5xxx #include #endif -#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) +#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) #include #endif @@ -111,7 +111,8 @@ static int init_func_watchdog_init(void) { # if defined(CONFIG_HW_WATCHDOG) && (defined(CONFIG_BLACKFIN) || \ defined(CONFIG_M68K) || defined(CONFIG_MICROBLAZE) || \ - defined(CONFIG_SH)) + defined(CONFIG_SH) || defined(CONFIG_AT91SAM9_WATCHDOG) || \ + defined(CONFIG_IMX_WATCHDOG)) hw_watchdog_init(); # endif puts(" Watchdog enabled\n"); @@ -128,14 +129,11 @@ int init_func_watchdog_reset(void) } #endif /* CONFIG_WATCHDOG */ -void __board_add_ram_info(int use_default) +__weak void board_add_ram_info(int use_default) { /* please define platform specific board_add_ram_info() */ } -void board_add_ram_info(int) - __attribute__ ((weak, alias("__board_add_ram_info"))); - static int init_baud_rate(void) { gd->baudrate = getenv_ulong("baudrate", 10, CONFIG_BAUDRATE); @@ -145,17 +143,19 @@ static int init_baud_rate(void) static int display_text_info(void) { #ifndef CONFIG_SANDBOX - ulong bss_start, bss_end; + ulong bss_start, bss_end, text_base; bss_start = (ulong)&__bss_start; bss_end = (ulong)&__bss_end; - debug("U-Boot code: %08X -> %08lX BSS: -> %08lX\n", #ifdef CONFIG_SYS_TEXT_BASE - CONFIG_SYS_TEXT_BASE, bss_start, bss_end); + text_base = CONFIG_SYS_TEXT_BASE; #else - CONFIG_SYS_MONITOR_BASE, bss_start, bss_end); + text_base = CONFIG_SYS_MONITOR_BASE; #endif + + debug("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", + text_base, bss_start, bss_end); #endif #ifdef CONFIG_MODEM_SUPPORT @@ -175,7 +175,7 @@ static int announce_dram_init(void) return 0; } -#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) +#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) static int init_func_ram(void) { #ifdef CONFIG_BOARD_TYPES @@ -221,7 +221,7 @@ static int show_dram_config(void) return 0; } -void __dram_init_banksize(void) +__weak void dram_init_banksize(void) { #if defined(CONFIG_NR_DRAM_BANKS) && defined(CONFIG_SYS_SDRAM_BASE) gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; @@ -229,9 +229,6 @@ void __dram_init_banksize(void) #endif } -void dram_init_banksize(void) - __attribute__((weak, alias("__dram_init_banksize"))); - #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SYS_I2C) static int init_func_i2c(void) { @@ -266,7 +263,7 @@ static int zero_global_data(void) static int setup_mon_len(void) { -#ifdef __ARM__ +#if defined(__ARM__) || defined(__MICROBLAZE__) gd->mon_len = (ulong)&__bss_end - (ulong)_start; #elif defined(CONFIG_SANDBOX) gd->mon_len = (ulong)&_end - (ulong)_init; @@ -291,7 +288,7 @@ static int read_fdt_from_file(void) struct sandbox_state *state = state_get_current(); const char *fname = state->fdt_fname; void *blob; - ssize_t size; + loff_t size; int err; int fd; @@ -304,10 +301,10 @@ static int read_fdt_from_file(void) return -EINVAL; } - size = os_get_filesize(fname); - if (size < 0) { + err = os_get_filesize(fname, &size); + if (err < 0) { printf("Failed to file FDT file '%s'\n", fname); - return -ENOENT; + return err; } fd = os_open(fname, OS_O_RDONLY); if (fd < 0) { @@ -341,27 +338,41 @@ static int setup_ram_buf(void) static int setup_fdt(void) { -#ifdef CONFIG_OF_EMBED +#ifdef CONFIG_OF_CONTROL +# ifdef CONFIG_OF_EMBED /* Get a pointer to the FDT */ gd->fdt_blob = __dtb_dt_begin; -#elif defined CONFIG_OF_SEPARATE +# elif defined CONFIG_OF_SEPARATE /* FDT is at end of image */ gd->fdt_blob = (ulong *)&_end; -#elif defined(CONFIG_OF_HOSTFILE) +# elif defined(CONFIG_OF_HOSTFILE) if (read_fdt_from_file()) { puts("Failed to read control FDT\n"); return -1; } -#endif +# endif /* Allow the early environment to override the fdt address */ gd->fdt_blob = (void *)getenv_ulong("fdtcontroladdr", 16, (uintptr_t)gd->fdt_blob); +#endif return 0; } /* Get the top of usable RAM */ __weak ulong board_get_usable_ram_top(ulong total_size) { +#ifdef CONFIG_SYS_SDRAM_BASE + /* + * Detect whether we have so much RAM it goes past the end of our + * 32-bit address space. If so, clip the usable RAM so it doesn't. + */ + if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) + /* + * Will wrap back to top of 32-bit space when reservations + * are made. + */ + return 0; +#endif return gd->ram_top; } @@ -392,7 +403,7 @@ static int setup_dest_addr(void) gd->ram_top = board_get_usable_ram_top(gd->mon_len); gd->relocaddr = gd->ram_top; debug("Ram top: %08lX\n", (ulong)gd->ram_top); -#if (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) +#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500)) /* * We need to make sure the location we intend to put secondary core * boot code is reserved and not used by any part of u-boot @@ -575,48 +586,22 @@ static int reserve_fdt(void) return 0; } -static int reserve_stacks(void) +int arch_reserve_stacks(void) { -#ifdef CONFIG_SPL_BUILD -# ifdef CONFIG_ARM - gd->start_addr_sp -= 128; /* leave 32 words for abort-stack */ - gd->irq_sp = gd->start_addr_sp; -# endif -#else -# ifdef CONFIG_PPC - ulong *s; -# endif + return 0; +} - /* setup stack pointer for exceptions */ +static int reserve_stacks(void) +{ + /* make stack pointer 16-byte aligned */ gd->start_addr_sp -= 16; gd->start_addr_sp &= ~0xf; - gd->irq_sp = gd->start_addr_sp; /* - * Handle architecture-specific things here - * TODO(sjg@chromium.org): Perhaps create arch_reserve_stack() - * to handle this and put in arch/xxx/lib/stack.c + * let the architecture specific code tailor gd->start_addr_sp and + * gd->irq_sp */ -# if defined(CONFIG_ARM) && !defined(CONFIG_ARM64) -# ifdef CONFIG_USE_IRQ - gd->start_addr_sp -= (CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ); - debug("Reserving %zu Bytes for IRQ stack at: %08lx\n", - CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ, gd->start_addr_sp); - - /* 8-byte alignment for ARM ABI compliance */ - gd->start_addr_sp &= ~0x07; -# endif - /* leave 3 words for abort-stack, plus 1 for alignment */ - gd->start_addr_sp -= 16; -# elif defined(CONFIG_PPC) - /* Clear initial stack frame */ - s = (ulong *) gd->start_addr_sp; - *s = 0; /* Terminate back chain */ - *++s = 0; /* NULL return address */ -# endif /* Architecture specific code */ - - return 0; -#endif + return arch_reserve_stacks(); } static int display_new_sp(void) @@ -626,7 +611,7 @@ static int display_new_sp(void) return 0; } -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) static int setup_board_part1(void) { bd_t *bd = gd->bd; @@ -647,7 +632,7 @@ static int setup_board_part1(void) defined(CONFIG_E500) || defined(CONFIG_MPC86xx) bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */ #endif -#if defined(CONFIG_MPC5xxx) +#if defined(CONFIG_MPC5xxx) || defined(CONFIG_M68K) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ #endif #if defined(CONFIG_MPC83xx) @@ -676,6 +661,14 @@ static int setup_board_part2(void) bd->bi_ipbfreq = gd->arch.ipb_clk; bd->bi_pcifreq = gd->pci_clk; #endif /* CONFIG_MPC5xxx */ +#if defined(CONFIG_M68K) && defined(CONFIG_PCI) + bd->bi_pcifreq = gd->pci_clk; +#endif +#if defined(CONFIG_EXTRA_CLOCK) + bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */ + bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */ + bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */ +#endif return 0; } @@ -737,6 +730,13 @@ static int setup_reloc(void) { #ifdef CONFIG_SYS_TEXT_BASE gd->reloc_off = gd->relocaddr - CONFIG_SYS_TEXT_BASE; +#ifdef CONFIG_M68K + /* + * On all ColdFire arch cpu, monitor code starts always + * just after the default vector table location, so at 0x400 + */ + gd->reloc_off = gd->relocaddr - (CONFIG_SYS_TEXT_BASE + 0x400); +#endif #endif memcpy(gd->new_gd, (char *)gd, sizeof(gd_t)); @@ -809,28 +809,32 @@ static int initf_dm(void) return 0; } +/* Architecture-specific memory reservation */ +__weak int reserve_arch(void) +{ + return 0; +} + static init_fnc_t init_sequence_f[] = { #ifdef CONFIG_SANDBOX setup_ram_buf, #endif setup_mon_len, setup_fdt, +#ifdef CONFIG_TRACE trace_early_init, +#endif + initf_malloc, #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) /* TODO: can this go into arch_cpu_init()? */ probecpu, #endif arch_cpu_init, /* basic arch cpu dependent setup */ -#ifdef CONFIG_X86 - cpu_init_f, /* TODO(sjg@chromium.org): remove */ -# ifdef CONFIG_OF_CONTROL - find_fdt, /* TODO(sjg@chromium.org): remove */ -# endif -#endif mark_bootstage, #ifdef CONFIG_OF_CONTROL fdtdec_check_fdt, #endif + initf_dm, #if defined(CONFIG_BOARD_EARLY_INIT_F) board_early_init_f, #endif @@ -857,6 +861,9 @@ static init_fnc_t init_sequence_f[] = { #endif #ifdef CONFIG_FSL_ESDHC get_clocks, +#endif +#ifdef CONFIG_M68K + get_clocks, #endif env_init, /* initialize environment */ #if defined(CONFIG_8xx_CPUCLK_DEFAULT) @@ -866,8 +873,6 @@ static init_fnc_t init_sequence_f[] = { sdram_adjust_866, init_timebase, #endif - initf_malloc, - initf_dm, init_baud_rate, /* initialze baudrate settings */ serial_init, /* serial communications setup */ console_init_f, /* stage 1 init of console */ @@ -886,7 +891,7 @@ static init_fnc_t init_sequence_f[] = { #if defined(CONFIG_MPC83xx) prt_83xx_rsr, #endif -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) checkcpu, #endif print_cpuinfo, /* display cpu info (and speed) */ @@ -894,7 +899,7 @@ static init_fnc_t init_sequence_f[] = { prt_mpc5xxx_clks, #endif /* CONFIG_MPC5xxx */ #if defined(CONFIG_DISPLAY_BOARDINFO) - checkboard, /* display board info */ + show_board_info, #endif INIT_FUNC_WATCHDOG_INIT #if defined(CONFIG_MISC_INIT_F) @@ -906,17 +911,13 @@ static init_fnc_t init_sequence_f[] = { #endif #if defined(CONFIG_HARD_SPI) init_func_spi, -#endif -#ifdef CONFIG_X86 - dram_init_f, /* configure available RAM banks */ - calculate_relocation_address, #endif announce_dram_init, /* TODO: unify all these dram functions? */ -#ifdef CONFIG_ARM +#if defined(CONFIG_ARM) || defined(CONFIG_X86) || defined(CONFIG_MICROBLAZE) || defined(CONFIG_AVR32) dram_init, /* configure available RAM banks */ #endif -#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) +#if defined(CONFIG_MIPS) || defined(CONFIG_PPC) || defined(CONFIG_M68K) init_func_ram, #endif #ifdef CONFIG_POST @@ -980,10 +981,11 @@ static init_fnc_t init_sequence_f[] = { setup_machine, reserve_global_data, reserve_fdt, + reserve_arch, reserve_stacks, setup_dram_config, show_dram_config, -#ifdef CONFIG_PPC +#if defined(CONFIG_PPC) || defined(CONFIG_M68K) setup_board_part1, INIT_FUNC_WATCHDOG_RESET setup_board_part2, @@ -995,6 +997,11 @@ static init_fnc_t init_sequence_f[] = { INIT_FUNC_WATCHDOG_RESET reloc_fdt, setup_reloc, +#ifdef CONFIG_X86 + copy_uboot_to_ram, + clear_bss, + do_elf_reloc_fixups, +#endif #if !defined(CONFIG_ARM) && !defined(CONFIG_SANDBOX) jump_to_copy, #endif @@ -1054,9 +1061,6 @@ void board_init_f(ulong boot_flags) */ static init_fnc_t init_sequence_f_r[] = { init_cache_f_r, - copy_uboot_to_ram, - clear_bss, - do_elf_reloc_fixups, NULL, }; @@ -1071,9 +1075,27 @@ void board_init_f_r(void) * Transfer execution from Flash to RAM by calculating the address * of the in-RAM copy of board_init_r() and calling it */ - (board_init_r + gd->reloc_off)(gd, gd->relocaddr); + (board_init_r + gd->reloc_off)((gd_t *)gd, gd->relocaddr); /* NOTREACHED - board_init_r() does not return */ hang(); } +#else +ulong board_init_f_mem(ulong top) +{ + /* Leave space for the stack we are running with now */ + top -= 0x40; + + top -= sizeof(struct global_data); + top = ALIGN(top, 16); + gd = (struct global_data *)top; + memset((void *)gd, '\0', sizeof(*gd)); + +#ifdef CONFIG_SYS_MALLOC_F_LEN + top -= CONFIG_SYS_MALLOC_F_LEN; + gd->malloc_base = top; +#endif + + return top; +} #endif /* CONFIG_X86 */