X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=doc%2FREADME.m68k;h=9d5c08f768ca616ffeb6f6ef496d52f78896cfac;hb=9b6b3c1b50bac5a1fe8870c2c19d62c118a79147;hp=0c533f3fa9c300435b3be2fb716c132e77376e15;hpb=42fd5f87b1613d3039f57e93c16f760a768d3e84;p=people%2Fms%2Fu-boot.git diff --git a/doc/README.m68k b/doc/README.m68k index 0c533f3fa9..9d5c08f768 100644 --- a/doc/README.m68k +++ b/doc/README.m68k @@ -17,7 +17,7 @@ Motorola M68K series of CPUs. Bernhard Kuhn ported U-Boot 0.4.0 to the Motorola Coldfire architecture. The patches of Bernhard support the MCF5272 and MCF5282. A great disadvantage of these patches was that they needed -a pre-bootloader to start u-boot. Because of this, a new port was +a pre-bootloader to start U-Boot. Because of this, a new port was created which no longer needs a first stage booter. Although this port is intended to cover all M68k processors, only @@ -31,12 +31,12 @@ hopefully added soon! 2.1 Motorola Coldfire MCF5272 ----------------------------- -CPU specific code is located in: cpu/mcf52x2 +CPU specific code is located in: arch/m68k/cpu/mcf52x2 2.1 Motorola Coldfire MCF5282 ----------------------------- -CPU specific code is located in: cpu/mcf52x2 +CPU specific code is located in: arch/m68k/cpu/mcf52x2 The MCF5282 Port no longer needs a preloader and can place in external or internal FLASH. @@ -53,8 +53,8 @@ To configure the board, type: make M5272C3_config U-Boot Memory Map: ------------------ -0xffe00000 - 0xffe3ffff u-boot -0xffe04000 - 0xffe05fff environment (embedded in u-boot!) +0xffe00000 - 0xffe3ffff U-Boot +0xffe04000 - 0xffe05fff environment (embedded in U-Boot!) 0xffe40000 - 0xffffffff free for linux/applications @@ -65,14 +65,14 @@ Board specific code is located in: board/m5282evb To configure the board, type: make M5272C3_config At the moment the code isn't fully implemented and still needs a pre-loader! -The preloader must initialize the processor and then start u-boot. The board +The preloader must initialize the processor and then start U-Boot. The board must be configured for a pre-loader (see 4.1) For the preloader, please see http://mailman.uclinux.org/pipermail/uclinux-dev/2003-December/023384.html -U-boot is configured to run at 0x20000 at default. This can be configured by -change TEXT_BASE in board/m5282evb/config.mk and CFG_MONITOR_BASE in +U-Boot is configured to run at 0x20000 at default. This can be configured by +change CONFIG_SYS_TEXT_BASE in board/m5282evb/config.mk and CONFIG_SYS_MONITOR_BASE in include/configs/M5282EVB.h. 3.2 BuS EB+MCF-EV123 @@ -91,12 +91,12 @@ make EB+MCF-EV123_internal_config for internal FLASH 4.1 Configuration to use a pre-loader ------------------------------------- -If u-boot should be loaded to RAM and started by a pre-loader +If U-Boot should be loaded to RAM and started by a pre-loader CONFIG_MONITOR_IS_IN_RAM must be defined. If it is defined the initial vector table and basic processor initialization will not -be compiled in. The start address of u-boot must be adjusted in -the boards config header file (CFG_MONITOR_BASE) and Makefile -(TEXT_BASE) to the load address. +be compiled in. The start address of U-Boot must be adjusted in +the boards config header file (CONFIG_SYS_MONITOR_BASE) and Makefile +(CONFIG_SYS_TEXT_BASE) to the load address. 4.1 MCF5272 specific Options/Settings ------------------------------------- @@ -105,22 +105,22 @@ CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs CONFIG_M5272 -- defined for all Motorola MCF5272 CPUs CONFIG_MONITOR_IS_IN_RAM - -- defined if u-boot is loaded by a pre-loader + -- defined if U-Boot is loaded by a pre-loader -CFG_MBAR -- defines the base address of the MCF5272 configuration registers -CFG_INIT_RAM_ADDR +CONFIG_SYS_MBAR -- defines the base address of the MCF5272 configuration registers +CONFIG_SYS_INIT_RAM_ADDR -- defines the base address of the MCF5272 internal SRAM -CFG_ENET_BD_BASE - -- defines the base addres of the FEC buffer descriptors +CONFIG_SYS_ENET_BD_BASE + -- defines the base address of the FEC buffer descriptors -CFG_SCR -- defines the contents of the System Configuration Register -CFG_SPR -- defines the contents of the System Protection Register -CFG_BRx_PRELIM -- defines the contents of the Chip Select Base Registers -CFG_ORx_PRELIM -- defines the contents of the Chip Select Option Registers +CONFIG_SYS_SCR -- defines the contents of the System Configuration Register +CONFIG_SYS_SPR -- defines the contents of the System Protection Register +CONFIG_SYS_BRx_PRELIM -- defines the contents of the Chip Select Base Registers +CONFIG_SYS_ORx_PRELIM -- defines the contents of the Chip Select Option Registers -CFG_PxDDR -- defines the contents of the Data Direction Registers -CFG_PxDAT -- defines the contents of the Data Registers -CFG_PXCNT -- defines the contents of the Port Configuration Registers +CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers +CONFIG_SYS_PxDAT -- defines the contents of the Data Registers +CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers 4.2 MCF5282 specific Options/Settings @@ -130,34 +130,34 @@ CONFIG_MCF52x2 -- defined for all MCF52x2 CPUs CONFIG_M5282 -- defined for all Motorola MCF5282 CPUs CONFIG_MONITOR_IS_IN_RAM - -- defined if u-boot is loaded by a pre-loader + -- defined if U-Boot is loaded by a pre-loader -CFG_MBAR -- defines the base address of the MCF5282 internal register space -CFG_INIT_RAM_ADDR +CONFIG_SYS_MBAR -- defines the base address of the MCF5282 internal register space +CONFIG_SYS_INIT_RAM_ADDR -- defines the base address of the MCF5282 internal SRAM -CFG_INT_FLASH_BASE +CONFIG_SYS_INT_FLASH_BASE -- defines the base address of the MCF5282 internal Flash memory -CFG_ENET_BD_BASE - -- defines the base addres of the FEC buffer descriptors +CONFIG_SYS_ENET_BD_BASE + -- defines the base address of the FEC buffer descriptors -CFG_MFD +CONFIG_SYS_MFD -- defines the PLL Multiplication Factor Devider (see table 9-4 of MCF user manual) -CFG_RFD -- defines the PLL Reduce Frecuency Devider +CONFIG_SYS_RFD -- defines the PLL Reduce Frecuency Devider (see table 9-4 of MCF user manual) -CFG_CSx_BASE -- defines the base address of chip select x -CFG_CSx_SIZE -- defines the memory size (address range) of chip select x -CFG_CSx_WIDTH -- defines the bus with of chip select x -CFG_CSx_RO -- if set to 0 chip select x is read/wirte +CONFIG_SYS_CSx_BASE -- defines the base address of chip select x +CONFIG_SYS_CSx_SIZE -- defines the memory size (address range) of chip select x +CONFIG_SYS_CSx_WIDTH -- defines the bus with of chip select x +CONFIG_SYS_CSx_RO -- if set to 0 chip select x is read/wirte else chipselct is read only -CFG_CSx_WS -- defines the number of wait states of chip select x +CONFIG_SYS_CSx_WS -- defines the number of wait states of chip select x -CFG_PxDDR -- defines the contents of the Data Direction Registers -CFG_PxDAT -- defines the contents of the Data Registers -CFG_PXCNT -- defines the contents of the Port Configuration Registers +CONFIG_SYS_PxDDR -- defines the contents of the Data Direction Registers +CONFIG_SYS_PxDAT -- defines the contents of the Data Registers +CONFIG_SYS_PXCNT -- defines the contents of the Port Configuration Registers -CFG_PxPAR -- defines the function of ports +CONFIG_SYS_PxPAR -- defines the function of ports 5. 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