X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=drivers%2Fmmc%2Fomap_hsmmc.c;h=83dda09c1feb8611341aebbe60f0f7e997742b0d;hb=17c9a1c121e7d78d820fdb4f7ca070f53e23c29a;hp=ef2cbf9e2fa574cd2846c280149cca2cf1dbc28b;hpb=5aa7bece1045c28806ce919099616ebe8fa63325;p=people%2Fms%2Fu-boot.git diff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c index ef2cbf9e2f..83dda09c1f 100644 --- a/drivers/mmc/omap_hsmmc.c +++ b/drivers/mmc/omap_hsmmc.c @@ -31,10 +31,18 @@ #include #include #include -#include #include #include +#if !defined(CONFIG_SOC_KEYSTONE) +#include #include +#endif +#ifdef CONFIG_MMC_OMAP36XX_PINS +#include +#endif +#include + +DECLARE_GLOBAL_DATA_PTR; /* simplify defines to OMAP_HSMMC_USE_GPIO */ #if (defined(CONFIG_OMAP_GPIO) && !defined(CONFIG_SPL_BUILD)) || \ @@ -48,13 +56,26 @@ #define SYSCTL_SRC (1 << 25) #define SYSCTL_SRD (1 << 26) +struct omap_hsmmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + struct omap_hsmmc_data { struct hsmmc *base_addr; +#ifndef CONFIG_DM_MMC struct mmc_config cfg; +#endif #ifdef OMAP_HSMMC_USE_GPIO +#ifdef CONFIG_DM_MMC + struct gpio_desc cd_gpio; /* Change Detect GPIO */ + struct gpio_desc wp_gpio; /* Write Protect GPIO */ + bool cd_inverted; +#else int cd_gpio; int wp_gpio; #endif +#endif }; /* If we fail after 1 second wait, something is really bad */ @@ -64,7 +85,25 @@ static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size); static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, unsigned int siz); -#ifdef OMAP_HSMMC_USE_GPIO +static inline struct omap_hsmmc_data *omap_hsmmc_get_data(struct mmc *mmc) +{ +#ifdef CONFIG_DM_MMC + return dev_get_priv(mmc->dev); +#else + return (struct omap_hsmmc_data *)mmc->priv; +#endif +} +static inline struct mmc_config *omap_hsmmc_get_cfg(struct mmc *mmc) +{ +#ifdef CONFIG_DM_MMC + struct omap_hsmmc_plat *plat = dev_get_platdata(mmc->dev); + return &plat->cfg; +#else + return &((struct omap_hsmmc_data *)mmc->priv)->cfg; +#endif +} + + #if defined(OMAP_HSMMC_USE_GPIO) && !defined(CONFIG_DM_MMC) static int omap_mmc_setup_gpio_in(int gpio, const char *label) { int ret; @@ -85,66 +124,43 @@ static int omap_mmc_setup_gpio_in(int gpio, const char *label) } #endif -#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER) -static void omap4_vmmc_pbias_config(struct mmc *mmc) -{ - u32 value = 0; - - value = readl((*ctrl)->control_pbiaslite); - value &= ~(MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ); - writel(value, (*ctrl)->control_pbiaslite); - /* set VMMC to 3V */ - twl6030_power_mmc_init(); - value = readl((*ctrl)->control_pbiaslite); - value |= MMC1_PBIASLITE_VMODE | MMC1_PBIASLITE_PWRDNZ | MMC1_PWRDNZ; - writel(value, (*ctrl)->control_pbiaslite); -} -#endif - -#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER) -static void omap5_pbias_config(struct mmc *mmc) -{ - u32 value = 0; - - value = readl((*ctrl)->control_pbias); - value &= ~SDCARD_PWRDNZ; - writel(value, (*ctrl)->control_pbias); - udelay(10); /* wait 10 us */ - value &= ~SDCARD_BIAS_PWRDNZ; - writel(value, (*ctrl)->control_pbias); - - palmas_mmc1_poweron_ldo(); - - value = readl((*ctrl)->control_pbias); - value |= SDCARD_BIAS_PWRDNZ; - writel(value, (*ctrl)->control_pbias); - udelay(150); /* wait 150 us */ - value |= SDCARD_PWRDNZ; - writel(value, (*ctrl)->control_pbias); - udelay(150); /* wait 150 us */ -} -#endif - static unsigned char mmc_board_init(struct mmc *mmc) { #if defined(CONFIG_OMAP34XX) + struct mmc_config *cfg = omap_hsmmc_get_cfg(mmc); t2_t *t2_base = (t2_t *)T2_BASE; struct prcm *prcm_base = (struct prcm *)PRCM_BASE; u32 pbias_lite; +#ifdef CONFIG_MMC_OMAP36XX_PINS + u32 wkup_ctrl = readl(OMAP34XX_CTRL_WKUP_CTRL); +#endif pbias_lite = readl(&t2_base->pbias_lite); pbias_lite &= ~(PBIASLITEPWRDNZ1 | PBIASLITEPWRDNZ0); - writel(pbias_lite, &t2_base->pbias_lite); +#ifdef CONFIG_TARGET_OMAP3_CAIRO + /* for cairo board, we need to set up 1.8 Volt bias level on MMC1 */ + pbias_lite &= ~PBIASLITEVMODE0; #endif -#if defined(CONFIG_TWL4030_POWER) - twl4030_power_mmc_init(); - mdelay(100); /* ramp-up delay from Linux code */ +#ifdef CONFIG_MMC_OMAP36XX_PINS + if (get_cpu_family() == CPU_OMAP36XX) { + /* Disable extended drain IO before changing PBIAS */ + wkup_ctrl &= ~OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ; + writel(wkup_ctrl, OMAP34XX_CTRL_WKUP_CTRL); + } #endif -#if defined(CONFIG_OMAP34XX) + writel(pbias_lite, &t2_base->pbias_lite); + writel(pbias_lite | PBIASLITEPWRDNZ1 | PBIASSPEEDCTRL0 | PBIASLITEPWRDNZ0, &t2_base->pbias_lite); +#ifdef CONFIG_MMC_OMAP36XX_PINS + if (get_cpu_family() == CPU_OMAP36XX) + /* Enable extended drain IO after changing PBIAS */ + writel(wkup_ctrl | + OMAP34XX_CTRL_WKUP_CTRL_GPIO_IO_PWRDNZ, + OMAP34XX_CTRL_WKUP_CTRL); +#endif writel(readl(&t2_base->devconf0) | MMCSDIO1ADPCLKISEL, &t2_base->devconf0); @@ -152,7 +168,7 @@ static unsigned char mmc_board_init(struct mmc *mmc) &t2_base->devconf1); /* Change from default of 52MHz to 26MHz if necessary */ - if (!(mmc->cfg->host_caps & MMC_MODE_HS_52MHz)) + if (!(cfg->host_caps & MMC_MODE_HS_52MHz)) writel(readl(&t2_base->ctl_prog_io1) & ~CTLPROGIO1SPEEDCTRL, &t2_base->ctl_prog_io1); @@ -165,14 +181,10 @@ static unsigned char mmc_board_init(struct mmc *mmc) &prcm_base->iclken1_core); #endif -#if defined(CONFIG_OMAP44XX) && defined(CONFIG_TWL6030_POWER) +#if defined(CONFIG_OMAP54XX) || defined(CONFIG_OMAP44XX) /* PBIAS config needed for MMC1 only */ - if (mmc->block_dev.dev == 0) - omap4_vmmc_pbias_config(mmc); -#endif -#if defined(CONFIG_OMAP54XX) && defined(CONFIG_PALMAS_POWER) - if (mmc->block_dev.dev == 0) - omap5_pbias_config(mmc); + if (mmc_get_blk_desc(mmc)->devnum == 0) + vmmc_pbias_config(LDO_VOLT_3V0); #endif return 0; @@ -206,15 +218,15 @@ void mmc_init_stream(struct hsmmc *mmc_base) writel(readl(&mmc_base->con) & ~INIT_INITSTREAM, &mmc_base->con); } - static int omap_hsmmc_init_setup(struct mmc *mmc) { + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); struct hsmmc *mmc_base; unsigned int reg_val; unsigned int dsor; ulong start; - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; + mmc_base = priv->base_addr; mmc_board_init(mmc); writel(readl(&mmc_base->sysconfig) | MMC_SOFTRESET, @@ -223,7 +235,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) while ((readl(&mmc_base->sysstatus) & RESETDONE) == 0) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for cc2!\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } writel(readl(&mmc_base->sysctl) | SOFTRESETALL, &mmc_base->sysctl); @@ -232,7 +244,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for softresetall!\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } writel(DTW_1_BITMODE | SDBP_PWROFF | SDVS_3V0, &mmc_base->hctl); @@ -254,7 +266,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc) while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for ics!\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); @@ -297,7 +309,7 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) * (reset procedure is completed). */ #if defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \ - defined(CONFIG_AM33XX) + defined(CONFIG_AM33XX) || defined(CONFIG_AM43XX) if (!(readl(&mmc_base->sysctl) & bit)) { start = get_timer(0); while (!(readl(&mmc_base->sysctl) & bit)) { @@ -319,17 +331,18 @@ static void mmc_reset_controller_fsm(struct hsmmc *mmc_base, u32 bit) static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data) { + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); struct hsmmc *mmc_base; unsigned int flags, mmc_stat; ulong start; - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; + mmc_base = priv->base_addr; start = get_timer(0); while ((readl(&mmc_base->pstate) & (DATI_MASK | CMDI_MASK)) != 0) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting on cmd inhibit to clear\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } writel(0xFFFFFFFF, &mmc_base->stat); @@ -338,7 +351,7 @@ static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for STAT (%x) to clear\n", __func__, readl(&mmc_base->stat)); - return TIMEOUT; + return -ETIMEDOUT; } } /* @@ -402,13 +415,13 @@ static int omap_hsmmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, mmc_stat = readl(&mmc_base->stat); if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s : timeout: No status update\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } while (!mmc_stat); if ((mmc_stat & IE_CTO) != 0) { mmc_reset_controller_fsm(mmc_base, SYSCTL_SRC); - return TIMEOUT; + return -ETIMEDOUT; } else if ((mmc_stat & ERRI_MASK) != 0) return -1; @@ -456,7 +469,7 @@ static int mmc_read_data(struct hsmmc *mmc_base, char *buf, unsigned int size) if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for status!\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } while (mmc_stat == 0); @@ -511,7 +524,7 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for status!\n", __func__); - return TIMEOUT; + return -ETIMEDOUT; } } while (mmc_stat == 0); @@ -546,13 +559,14 @@ static int mmc_write_data(struct hsmmc *mmc_base, const char *buf, return 0; } -static void omap_hsmmc_set_ios(struct mmc *mmc) +static int omap_hsmmc_set_ios(struct mmc *mmc) { + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); struct hsmmc *mmc_base; unsigned int dsor = 0; ulong start; - mmc_base = ((struct omap_hsmmc_data *)mmc->priv)->base_addr; + mmc_base = priv->base_addr; /* configue bus width */ switch (mmc->bus_width) { case 8: @@ -594,39 +608,72 @@ static void omap_hsmmc_set_ios(struct mmc *mmc) while ((readl(&mmc_base->sysctl) & ICS_MASK) == ICS_NOTREADY) { if (get_timer(0) - start > MAX_RETRY_MS) { printf("%s: timedout waiting for ics!\n", __func__); - return; + return -ETIMEDOUT; } } writel(readl(&mmc_base->sysctl) | CEN_ENABLE, &mmc_base->sysctl); + + return 0; } #ifdef OMAP_HSMMC_USE_GPIO +#ifdef CONFIG_DM_MMC static int omap_hsmmc_getcd(struct mmc *mmc) { - struct omap_hsmmc_data *priv_data = mmc->priv; + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); + int value; + + value = dm_gpio_get_value(&priv->cd_gpio); + /* if no CD return as 1 */ + if (value < 0) + return 1; + + if (priv->cd_inverted) + return !value; + return value; +} + +static int omap_hsmmc_getwp(struct mmc *mmc) +{ + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); + int value; + + value = dm_gpio_get_value(&priv->wp_gpio); + /* if no WP return as 0 */ + if (value < 0) + return 0; + return value; +} +#else +static int omap_hsmmc_getcd(struct mmc *mmc) +{ + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); int cd_gpio; /* if no CD return as 1 */ - cd_gpio = priv_data->cd_gpio; + cd_gpio = priv->cd_gpio; if (cd_gpio < 0) return 1; - return gpio_get_value(cd_gpio); + /* NOTE: assumes card detect signal is active-low */ + return !gpio_get_value(cd_gpio); } static int omap_hsmmc_getwp(struct mmc *mmc) { - struct omap_hsmmc_data *priv_data = mmc->priv; + struct omap_hsmmc_data *priv = omap_hsmmc_get_data(mmc); int wp_gpio; /* if no WP return as 0 */ - wp_gpio = priv_data->wp_gpio; + wp_gpio = priv->wp_gpio; if (wp_gpio < 0) return 0; + /* NOTE: assumes write protect signal is active-high */ return gpio_get_value(wp_gpio); } #endif +#endif static const struct mmc_ops omap_hsmmc_ops = { .send_cmd = omap_hsmmc_send_cmd, @@ -638,30 +685,32 @@ static const struct mmc_ops omap_hsmmc_ops = { #endif }; +#ifndef CONFIG_DM_MMC int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, int wp_gpio) { struct mmc *mmc; - struct omap_hsmmc_data *priv_data; + struct omap_hsmmc_data *priv; struct mmc_config *cfg; uint host_caps_val; - priv_data = malloc(sizeof(*priv_data)); - if (priv_data == NULL) + priv = malloc(sizeof(*priv)); + if (priv == NULL) return -1; - host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS | - MMC_MODE_HC; + host_caps_val = MMC_MODE_4BIT | MMC_MODE_HS_52MHz | MMC_MODE_HS; switch (dev_index) { case 0: - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; + priv->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; break; #ifdef OMAP_HSMMC2_BASE case 1: - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; + priv->base_addr = (struct hsmmc *)OMAP_HSMMC2_BASE; #if (defined(CONFIG_OMAP44XX) || defined(CONFIG_OMAP54XX) || \ - defined(CONFIG_DRA7XX)) && defined(CONFIG_HSMMC2_8BIT) + defined(CONFIG_DRA7XX) || defined(CONFIG_AM33XX) || \ + defined(CONFIG_AM43XX) || defined(CONFIG_SOC_KEYSTONE)) && \ + defined(CONFIG_HSMMC2_8BIT) /* Enable 8-bit interface for eMMC on OMAP4/5 or DRA7XX */ host_caps_val |= MMC_MODE_8BIT; #endif @@ -669,7 +718,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, #endif #ifdef OMAP_HSMMC3_BASE case 2: - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE; + priv->base_addr = (struct hsmmc *)OMAP_HSMMC3_BASE; #if defined(CONFIG_DRA7XX) && defined(CONFIG_HSMMC3_8BIT) /* Enable 8-bit interface for eMMC on DRA7XX */ host_caps_val |= MMC_MODE_8BIT; @@ -677,16 +726,16 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, break; #endif default: - priv_data->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; + priv->base_addr = (struct hsmmc *)OMAP_HSMMC1_BASE; return 1; } #ifdef OMAP_HSMMC_USE_GPIO /* on error gpio values are set to -1, which is what we want */ - priv_data->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd"); - priv_data->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp"); + priv->cd_gpio = omap_mmc_setup_gpio_in(cd_gpio, "mmc_cd"); + priv->wp_gpio = omap_mmc_setup_gpio_in(wp_gpio, "mmc_wp"); #endif - cfg = &priv_data->cfg; + cfg = &priv->cfg; cfg->name = "OMAP SD/MMC"; cfg->ops = &omap_hsmmc_ops; @@ -717,9 +766,111 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio, if ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <= CPU_3XX_ES21)) cfg->b_max = 1; #endif - mmc = mmc_create(cfg, priv_data); + mmc = mmc_create(cfg, priv); if (mmc == NULL) return -1; return 0; } +#else +static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev) +{ + struct omap_hsmmc_data *priv = dev_get_priv(dev); + struct omap_hsmmc_plat *plat = dev_get_platdata(dev); + struct mmc_config *cfg = &plat->cfg; + const void *fdt = gd->fdt_blob; + int node = dev_of_offset(dev); + int val; + + priv->base_addr = map_physmem(dev_get_addr(dev), sizeof(struct hsmmc *), + MAP_NOCACHE); + + cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS; + val = fdtdec_get_int(fdt, node, "bus-width", -1); + if (val < 0) { + printf("error: bus-width property missing\n"); + return -ENOENT; + } + + switch (val) { + case 0x8: + cfg->host_caps |= MMC_MODE_8BIT; + case 0x4: + cfg->host_caps |= MMC_MODE_4BIT; + break; + default: + printf("error: invalid bus-width property\n"); + return -ENOENT; + } + + cfg->f_min = 400000; + cfg->f_max = fdtdec_get_int(fdt, node, "max-frequency", 52000000); + cfg->voltages = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195; + cfg->b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT; + +#ifdef OMAP_HSMMC_USE_GPIO + priv->cd_inverted = fdtdec_get_bool(fdt, node, "cd-inverted"); +#endif + + return 0; +} + +#ifdef CONFIG_BLK + +static int omap_hsmmc_bind(struct udevice *dev) +{ + struct omap_hsmmc_plat *plat = dev_get_platdata(dev); + + return mmc_bind(dev, &plat->mmc, &plat->cfg); +} +#endif +static int omap_hsmmc_probe(struct udevice *dev) +{ + struct omap_hsmmc_plat *plat = dev_get_platdata(dev); + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct omap_hsmmc_data *priv = dev_get_priv(dev); + struct mmc_config *cfg = &plat->cfg; + struct mmc *mmc; + + cfg->name = "OMAP SD/MMC"; + cfg->ops = &omap_hsmmc_ops; + +#ifdef CONFIG_BLK + mmc = &plat->mmc; +#else + mmc = mmc_create(cfg, priv); + if (mmc == NULL) + return -1; +#endif + +#ifdef OMAP_HSMMC_USE_GPIO + gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio, GPIOD_IS_IN); + gpio_request_by_name(dev, "wp-gpios", 0, &priv->wp_gpio, GPIOD_IS_IN); +#endif + + mmc->dev = dev; + upriv->mmc = mmc; + + return 0; +} + +static const struct udevice_id omap_hsmmc_ids[] = { + { .compatible = "ti,omap3-hsmmc" }, + { .compatible = "ti,omap4-hsmmc" }, + { .compatible = "ti,am33xx-hsmmc" }, + { } +}; + +U_BOOT_DRIVER(omap_hsmmc) = { + .name = "omap_hsmmc", + .id = UCLASS_MMC, + .of_match = omap_hsmmc_ids, + .ofdata_to_platdata = omap_hsmmc_ofdata_to_platdata, +#ifdef CONFIG_BLK + .bind = omap_hsmmc_bind, +#endif + .probe = omap_hsmmc_probe, + .priv_auto_alloc_size = sizeof(struct omap_hsmmc_data), + .platdata_auto_alloc_size = sizeof(struct omap_hsmmc_plat), +}; +#endif