X-Git-Url: http://git.ipfire.org/?a=blobdiff_plain;f=gcc%2FChangeLog;h=52d14e92e64557456ecfc40d4a7ec5df09162771;hb=d6852b4754ab01c95fded5453fd9fa93dbb7ea94;hp=767dc025e95167d999ac5fe6831321bbf070d058;hpb=8aaf76ac98077ef0d4f08c603dc7371c514436e5;p=thirdparty%2Fgcc.git diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 767dc025e951..52d14e92e645 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,524 @@ +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (cbranchdi4): Accept reg_or_int_operand for + operand 2. + (cstoredi4): Similarly, but for operand 3. + * config/arm/arm.c (arm_canoncialize_comparison): Allow + canonicalization of unsigned compares with a constant on Arm. + Prefer using const+1 and adjusting the comparison over swapping the + operands whenever the original constant was not valid. + (arm_gen_dicompare_reg): If Y is not a valid operand, force it to a + register here. + (arm_validize_comparison): Do not force invalid DImode operands to + registers here. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.c (arm_select_cc_mode): For DImode equality tests + return CC_Zmode if comparing against a constant where one word is + zero. + (arm_gen_compare_reg): Split DImode handling to ... + (arm_gen_dicompare_reg): ... here. Handle equality comparisons + against simple constants. + * config/arm/arm.md (arm_cmpdi_zero): Delete pattern. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (subsi3_carryin_shift_alt): New pattern. + (rsbsi3_carryin_shift_alt): Likewise. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (negscc_borrow): New pattern. + (mov_negscc): Don't split if the insn would match negscc_borrow. + * config/arm/thumb2.md (thumb2_mov_negscc): Likewise. + (thumb2_mov_negscc_strict_it): Likewise. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.c (arm_insn_cost): New function. + (TARGET_INSN_COST): Override default definition. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.c (arm_rtx_costs_internal, case MINUS): Handle + borrow operations. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.c (strip_carry_operation): New function. + (arm_rtx_costs_internal, case PLUS): Handle addtion with carry-in + for SImode. + +2019-10-18 Richard Earnshaw + + * config/arm/predicates.md (arm_carry_operation): New special + predicate. + * config/arm/iterators.md (LTUGEU): Delete iterator. + (cnb): Delete code attribute. + (optab): Delete ltu and geu elements. + * config/arm/arm.md (addsi3_carryin): Renamed from + addsi3_carryin_. Remove iterator and use arm_carry_operand. + (add0si3_carryin): Similarly, but from add0si3_carryin_. + (addsi3_carryin_alt2): Similarly, but from addsi3_carryin_alt2_. + (addsi3_carryin_clobercc): Similarly. + (addsi3_carryin_shift): Similarly. Do not allow register shifts in + Thumb2 state. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (arm_subdi3): Delete insn. + (zextendsidi_negsi, negdi_extendsidi): Delete insn_and_split. + +2019-10-18 Richard Earnshaw + + * config/arm/arm-modes.def (CC_RSB): New CC mode. + * config/arm/predicates.md (arm_borrow_operation): Handle CC_RSBmode. + * config/arm/arm.c (arm_select_cc_mode): Detect when we should + return CC_RSBmode. + (maybe_get_arm_condition_code): Handle CC_RSBmode. + * config/arm/arm.md (subsi3_carryin): Make this pattern available to + expand. + (subdi3): Rewrite to early-expand the sub-operations. + (rsb_im_compare): New pattern. + (negdi2): Delete. + (negdi2_insn): Delete. + (arm_negsi2): Correct type attribute to alu_imm. + (negsi2_0compare): New insn pattern. + (negsi2_carryin): New insn pattern. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (addsi3_carryin_alt2): Use arm_not_operand for + operand 2. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (addsi3_carryin_shift_): Reorder operands + to match canonical form. + +2019-10-18 Richard Earnshaw + + * config/arm/arm.md (zero_extenddi2): Convert to define_expand. + (extenddi2): Likewise. + +2019-10-18 Richard Earnshaw + + * config/arm/arm-protos.h (arm_decompose_di_binop): New prototype. + * config/arm/arm.c (arm_decompose_di_binop): New function. + * config/arm/arm.md (adddi3): Also accept any const_int for op2. + If not generating Thumb-1 code, decompose the operation into 32-bit + pieces. + * add0si_carryin_: New pattern. + +2019-10-18 Richard Earnshaw + + * arm.md (adddi3): Only accept register operands. + (arm_adddi3): Convert to simple insn with no split. Do not accept + constants. + (adddi_sesidi_di): Delete patern. + (adddi_zesidi_di): Likewise. + (uaddv4): Use LTU as condition for branch. + (adddi3_compareV): Convert to simple insn with no split. + (addsi3_compareV_upper): Delete pattern. + (adddi3_compareC): Convert to simple insn with no split. Correct + flags setting expression. + (addsi3_compareC_upper): Delete pattern. + (addsi3_compareC): Correct flags setting expression. + (subdi3_compare1): Convert to simple insn with no split. + (subsi3_carryin_compare): Delete pattern. + (arm_subdi3): Convert to simple insn with no split. + (subdi_zesidi): Delete pattern. + (subdi_di_sesidi): Delete pattern. + (subdi_zesidi_di): Delete pattern. + (subdi_sesidi_di): Delete pattern. + (subdi_zesidi_zesidi): Delete pattern. + (negvdi3): Use s_register_operand. + (negdi2_compare): Convert to simple insn with no split. + (negdi2_insn): Likewise. + (negsi2_carryin_compare): Delete pattern. + (negdi_zero_extendsidi): Delete pattern. + (arm_cmpdi_insn): Convert to simple insn with no split. + (negdi2): Don't call gen_negdi2_neon. + * config/arm/neon.md (adddi3_neon): Delete pattern. + (subdi3_neon): Delete pattern. + (negdi2_neon): Delete pattern. + (splits for negdi2_neon): Delete splits. + +2019-10-18 Jakub Jelinek + + PR middle-end/92153 + * ggc-page.c (release_pages): Read g->alloc_size before free rather + than after it. + +2019-10-18 Andre Vieira + + * config/arm/t-multilib: Add rule to regenerate mutlilib header file + with any change to t-multilib, t-aprofile and t-rmprofile. Also add + new multilib variants and new mappings. + +2019-10-18 Georg-Johann Lay + + PR target/86040 + * config/avr/avr.c (avr_out_lpm): Do not shortcut-return. + +2019-10-18 Prathamesh Kulkarni + Richard Sandiford + + PR target/86753 + * tree-vectorizer.h (scalar_cond_masked_key): New struct, + and define hashmap traits for it. + (loop_vec_info::scalar_cond_masked_set): New member. + (vect_record_loop_mask): Adjust prototype. + * tree-vectorizer.c (scalar_cond_masked_key::get_cond_ops_from_tree): + Implement method. + * tree-vect-loop.c (vectorizable_reduction): Pass NULL as last arg to + vect_record_loop_mask. + (vectorizable_live_operation): Likewise. + (vect_record_loop_mask): New param scalar_mask. Add entry + cond, loop_mask to scalar_cond_masked_set if scalar_mask is non NULL. + * tree-vect-stmts.c (check_load_store_masking): New param scalar_mask. + Pass it as last arg to vect_record_loop_mask. + (vectorizable_call): Pass scalar_mask as last arg to + vect_record_loop_mask. + (vectorizable_store): Likewise. + (vectorizable_load): Likewise. + (vectorizable_condition): Check if another part of vectorized code + applies loop_mask to condition or to it's inverse, and if yes, + apply loop_mask to result of vector comparison. + +2019-10-17 John David Anglin + + * config/pa/pa.c (pa_output_indirect_call): Fix typos in last change. + +2019-10-18 Jakub Jelinek + + PR tree-optimization/92056 + * tree-ssa-strlen.c (determine_min_objsize): Call init_object_sizes + before calling compute_builtin_object_size. + +2019-10-17 Iain Sandoe + + PR target/65342 + * config/rs6000/darwin.md (movdi_low, movsi_low_st): Delete. + (movdi_low_st): Delete. + * config/rs6000/rs6000.c + (darwin_rs6000_legitimate_lo_sum_const_p): New. + (mem_operand_gpr): Validate Mach-O LO_SUM cases separately. + * config/rs6000/rs6000.md (movsi_low): Delete. + +2019-10-17 Jason Merrill + + * gimplify.h (get_initialized_tmp_var): Add default argument to + post_p. + * gimplify.c (gimplify_self_mod_expr, gimplify_omp_atomic): Remove + NULL post_p argument. + * targhooks (std_gimplify_va_arg_expr): Likewise. + +2019-10-17 Richard Biener + + * tree-vectorizer.h (_stmt_vec_info::cond_reduc_code): Remove. + (STMT_VINFO_VEC_COND_REDUC_CODE): Likewise. + * tree-vectorizer.c (vec_info::new_stmt_vec_info): Do not + initialize STMT_VINFO_VEC_COND_REDUC_CODE. + * tree-vect-loop.c (vect_is_simple_reduction): Set + STMT_VINFO_REDUC_CODE. + (vectorizable_reduction): Remove dead and redundant code, use + STMT_VINFO_REDUC_CODE instead of STMT_VINFO_VEC_COND_REDUC_CODE. + +2019-10-17 Georg-Johann Lay + + Fix breakage introduced by r276985. + + * config/avr/avr.c (avr_option_override): Remove set of + PARAM_ALLOW_STORE_DATA_RACES. + * common/config/avr/avr-common.c (avr_option_optimization_table) + [OPT_LEVELS_ALL]: Turn on -fallow-store-data-races. + +2019-10-17 H.J. Lu + + * config/i386/i386.h (processor_costs): Add clear_ratio. + (CLEAR_RATIO): Remove MIN and use ix86_cost->clear_ratio. + * config/i386/x86-tune-costs.h: Set clear_ratio to the minimum + of 6 and move_ratio in all cost models. + +2019-10-17 Richard Biener + + * tree-vect-loop.c (check_reduction_path): Compute reduction + operation here. + (vect_is_simple_reduction): Remove special-case of single-stmt + reduction path detection. + +2019-10-17 Richard Earnshaw + + * config/arm/arm-cpus.in (marvel-pj4): Add +fp to the architecture. + +2019-10-17 Yuliang Wang + + * config/aarch64/aarch64-sve2.md (aarch64_sve2_eor3) + (aarch64_sve2_nor, aarch64_sve2_nand) + (aarch64_sve2_bsl, aarch64_sve2_nbsl) + (aarch64_sve2_bsl1n, aarch64_sve2_bsl2n): + New combine patterns. + * config/aarch64/iterators.md (BSL_DUP): New int iterator for the + above. + (bsl_1st, bsl_2nd, bsl_dup, bsl_mov): Attributes for the above. + +2019-10-17 Aldy Hernandez + + * tree-vrp.c (value_range_base::dump): Display +INF for both + pointers and integers when appropriate. + +2019-10-17 Andre Vieira + + * tree-vect-loop.c (vect_analyze_loop_2): Use same condition to decide + when to use versioning threshold. + +2019-10-17 Andre Vieira + + * tree-vect-loop.c (determine_peel_for_niter): New function contained + outlined code from ... + (vect_analyze_loop_2): ... here. + +2019-10-17 Andre Vieira + + * tree-vect-loop.c (vect_transform_loop): Move code from here... + * tree-vect-loop-manip.c (vect_loop_versioning): ... to here. + * tree-vectorizer.h (vect_loop_versioning): Remove unused parameters. + +2019-10-17 Richard Biener + + * tree-vect-loop.c (needs_fold_left_reduction_p): Export. + (vect_is_simple_reduction): Move all validity checks ... + (vectorizable_reduction): ... here. Compute whether we + need a fold-left reduction here. + * tree-vect-patterns.c (vect_reassociating_reduction_p): Merge + both overloads, check needs_fold_left_reduction_p directly. + * tree-vectorizer.h (needs_fold_left_reduction_p): Declare. + +2019-10-17 Richard Biener + + * tree-ssa-pre.c (create_component_ref_by_pieces_1): Fix + TARGET_MEM_REF creation. + +2019-10-17 Richard Biener + + PR tree-optimization/92129 + * tree-vect-loop.c (vectorizable_reduction): Also fail + on GIMPLE_SINGLE_RHS. + +2019-10-17 Jakub Jelinek + + PR tree-optimization/92056 + * tree-object-size.c (cond_expr_object_size): Return early if then_ + processing resulted in unknown size. + + PR tree-optimization/92115 + * tree-ssa-ifcombine.c (ifcombine_ifandif): Force condition into + temporary if it could trap. + +2019-10-17 Richard Biener + + PR debug/91887 + * dwarf2out.c (gen_formal_parameter_die): Also try to match + context_die against a DW_TAG_GNU_formal_parameter_pack parent. + +2019-10-16 Jakub Jelinek + + * tree-ssa-strlen.c (maybe_invalidate): Use + HOST_WIDE_INT_PRINT_UNSIGNED instead of "%zu". + +2019-10-16 Andrew Burgess + Jim Wilson + + * config/riscv/riscv.h (REG_CLASS_CONTENTS): Add argument passing + regs to SIBCALL_REGS. + * config/riscv/riscv.c (riscv_regno_to_class): Change argument + passing regs to SIBCALL_REGS. + +2019-10-16 Martin Sebor + + PR tree-optimization/83821 + * tree-ssa-strlen.c (maybe_invalidate): Add argument. Consider + the length of a string when available. + (handle_builtin_memset) Add argument. + (handle_store, strlen_check_and_optimize_call): Same. + (check_and_optimize_stmt): Same. Pass it to callees. + +2019-10-16 Martin Sebor + + PR tree-optimization/91996 + * tree-ssa-strlen.c (maybe_warn_pointless_strcmp): Improve location + information. + (compare_nonzero_chars): Add an overload. + (count_nonzero_bytes): Add an argument. Call overload above. + Handle non-constant lengths in some range. + (handle_store): Add an argument. + (check_and_optimize_stmt): Pass an argument to handle_store. + +2019-10-16 Richard Earnshaw + + * config/arm/arm.c (neon_valid_immediate): Clear bytes before use. + +2019-10-16 Mihailo Stojanovic + + * config/mips/mips.c (mips_expand_builtin_insn): Force the + operands which correspond to the same input-output register to + have the same pseudo assigned to them. + +2019-10-16 Ilya Leoshkevich + + * cfgrtl.c (find_partition_fixes): Remove bbs_in_cold_partition. + +2019-10-16 Wilco Dijkstra + + * config/aarch64/aarch64.c (aarch64_classify_symbol): + Apply reasonable limit to symbol offsets. + +2019-10-16 Richard Biener + + * tree-vect-loop.c (vect_valid_reduction_input_p): Remove. + (vect_is_simple_reduction): Delay checking to + vectorizable_reduction and relax the checking. + (vectorizable_reduction): Check we have a simple use. Check + for bogus condition reductions. + * tree-vect-stmts.c (vect_transform_stmt): Make sure we + are looking at the last stmt in a pattern sequence when + filling in backedge PHI values. + +2019-10-16 Peter Bergner + Jiufu Guo + + PR target/70010 + * config/rs6000/rs6000.c (rs6000_can_inline_p): Prohibit inlining if + the callee explicitly disables some isa_flags the caller is using. + +2019-10-16 Richard Sandiford + + * function-abi.cc (expr_callee_abi): Assert for POINTER_TYPE_P. + +2019-10-16 Richard Sandiford + + * genmodes.c (mode_data::order): New field. + (blank_mode): Update accordingly. + (VECTOR_MODES_WITH_PREFIX): Add an order parameter. + (make_vector_modes): Likewise. + (VECTOR_MODES): Update use accordingly. + (cmp_modes): Sort by the new order field ahead of sorting by size. + * config/aarch64/aarch64-modes.def (VNx2QI, VN2xHI, VNx2SI) + (VNx4QI, VNx4HI, VNx8QI): New partial vector modes. + * config/aarch64/aarch64.c (VEC_PARTIAL): New flag value. + (aarch64_classify_vector_mode): Handle the new partial modes. + (aarch64_vl_bytes): New function. + (aarch64_hard_regno_nregs): Use it instead of BYTES_PER_SVE_VECTOR + when counting the number of registers in an SVE mode. + (aarch64_class_max_nregs): Likewise. + (aarch64_hard_regno_mode_ok): Don't allow partial vectors + in registers yet. + (aarch64_classify_address): Treat partial vectors analogously + to full vectors. + (aarch64_print_address_internal): Consolidate the printing of + MUL VL addresses, using aarch64_vl_bytes as the number of + bytes represented by "VL". + (aarch64_vector_mode_supported_p): Reject partial vector modes. + +2019-10-16 Richard Sandiford + + * config/aarch64/aarch64.c (aarch64_layout_frame): Use is_constant + rather than known_lt when choosing frame layouts. + +2019-10-16 Richard Sandiford + + * config/aarch64/aarch64.c (aarch64_layout_frame): Assert + that all the adjustments add up to the full frame size. + Use crtl->outgoing_args_size directly as the final adjustment + where appropriate. + +2019-10-16 Richard Sandiford + + * config/aarch64/aarch64.c (aarch64_layout_frame): Use a local + "frame" reference instead of always referring directly to + "cfun->machine->frame". + +2019-10-16 Richard Biener + + PR tree-optimization/92119 + * tree-vect-patterns.c (vect_recog_rotate_pattern): Guard + against missing bswap lhs. + +2019-10-16 Richard Sandiford + + PR middle-end/92033 + * poly-int.h (constant_lower_bound_with_limit): New function. + (constant_upper_bound_with_limit): Likewise. + * doc/poly-int.texi: Document them. + * tree-vrp.c (value_range_base::set): Convert POLY_INT_CST bounds + into the worst-case INTEGER_CST bounds. + +2019-10-16 Feng Xue + + PR ipa/91088 + * doc/invoke.texi (ipa-max-param-expr-ops): Document new option. + * params.def (PARAM_IPA_MAX_PARAM_EXPR_OPS): New. + * ipa-predicat.h (struct expr_eval_op): New struct. + (expr_eval_ops): New typedef. + (struct condition): Add type and param_ops fields, remove size field. + (add_condition): Replace size parameter with type parameter, add + param_ops parameter. + * ipa-predicat.c (expr_eval_ops_equal_p): New function. + (predicate::add_clause): Add comparisons on type and param_ops. + (dump_condition): Add debug dump for param_ops. + (remap_after_inlining): Adjust call arguments to add_condition. + (add_condition): Replace size parameter with type parameter, add + param_ops parameter. Unshare constant value used in conditions. + * ipa-fnsummary.c (evaluate_conditions_for_known_args): Fold + parameter expressions using param_ops. + (decompose_param_expr): New function. + (set_cond_stmt_execution_predicate): Use call to decompose_param_expr + to replace call to unmodified_parm_or_parm_agg_item. + (set_switch_stmt_execution_predicate): Likewise. + (will_be_nonconstant_expr_predicate): Likewise. Replace usage of size + with type. + (inline_read_section): Read param_ops from summary stream. + (ipa_fn_summary_write): Write param_ops to summary stream. + +2019-10-15 Segher Boessenkool + + PR rtl-optimization/92107 + * genattrtab.c (write_attr_value) : Parenthesize the + expression written. + +2019-10-15 Iain Sandoe + + * config/darwin.c: Update description of fix and continue. + +2019-10-15 Iain Sandoe + + * config/darwin.c (darwin_binds_local_p): Update to call + default_binds_local_p_3 () directly. amend comments. + +2019-10-15 Richard Biener + + * lto-streamer-out.c (lto_variably_modified_type_p): New. + (tree_is_indexable): Use it. + * tree-streamer-out.c (pack_ts_type_common_value_fields): + Stream variably_modified_type_p as TYPE_LANG_FLAG_0. + * tree-streamer-in.c (unpack_ts_type_common_value_fields): Likewise. + +2019-10-15 Jozef Lawrynowicz + + * config/msp430/msp430.md (zero_extendqipsi2): New. + (zero_extendqisi2): Optimize case where src register and base dst + register are the same. + (zero_extendhipsi2): Don't use 430X insn for rYs->r case. + (zero_extendpsisi2): Optimize r->m case. + Add unnamed insn patterns to catch insns combine searches for when + optimizing pointer manipulation. + +2019-10-15 Jozef Lawrynowicz + + * config/msp430/msp430.md: Group zero_extend* insns together. + 2019-10-15 Jozef Lawrynowicz * config/msp430/constraints.md: Allow post_inc operand for "Ya"